发明申请
US20100275174A1 Semiconductor device pattern creation method, pattern data processing method, pattern data processing program, and semiconductor device manufacturing method
审中-公开
半导体器件图案生成方法，图案数据处理方法，图案数据处理程序和半导体器件制造方法
- 专利标题： Semiconductor device pattern creation method, pattern data processing method, pattern data processing program, and semiconductor device manufacturing method
- 专利标题（中）： 半导体器件图案生成方法，图案数据处理方法，图案数据处理程序和半导体器件制造方法
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申请号： US12801895申请日： 2010-06-30
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公开(公告)号： US20100275174A1公开(公告)日： 2010-10-28
- 发明人: Ayako Nakano , Satoshi Tanaka , Toshiya Kotani
- 申请人： Ayako Nakano , Satoshi Tanaka , Toshiya Kotani
- 申请人地址： JP Tokyo
- 专利权人： KABUSHIKI KAISHA TOSHIBA
- 当前专利权人： KABUSHIKI KAISHA TOSHIBA
- 当前专利权人地址： JP Tokyo
- 优先权： JP2005-186311 20050627
- 主分类号： G06F17/50
- IPC分类号： G06F17/50
摘要：
A correction target pattern having a size not more than a threshold value is extracted from first design data containing a pattern of a semiconductor integrated circuit. The first characteristic of the semiconductor integrated circuit is calculated on the basis of the first design data. Second design data is generated by correcting the correction target pattern contained in the first design data. The second characteristic of the semiconductor integrated circuit is calculated on the basis of the second design data. It is checked whether the characteristic difference between the first characteristic and the second characteristic falls within a tolerance. It is decided to use the second design data to manufacture the semiconductor integrated circuit when the characteristic difference falls within the tolerance.
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