发明申请
- 专利标题： I/O Buffer Circuit
- 专利标题（中）： I / O缓冲电路
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申请号： US12835202申请日： 2010-07-13
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公开(公告)号： US20100277216A1公开(公告)日： 2010-11-04
- 发明人: Chua-Chin Wang , Wei-Chih Chang , Tzung-Je Lee , Kuo-Chan Huang , Tie-Yan Chang
- 申请人： Chua-Chin Wang , Wei-Chih Chang , Tzung-Je Lee , Kuo-Chan Huang , Tie-Yan Chang
- 申请人地址： TW Kaohsiung TW Sinshih Township
- 专利权人： NATIONAL SUN YAT-SEN UNIVERSITY,HIMAX TECHNOLOGIES LIMITED
- 当前专利权人： NATIONAL SUN YAT-SEN UNIVERSITY,HIMAX TECHNOLOGIES LIMITED
- 当前专利权人地址： TW Kaohsiung TW Sinshih Township
- 主分类号： H03L5/00
- IPC分类号： H03L5/00
摘要：
An output buffer circuit is provided. The output buffer circuit receives a control signal (OE) and a data signal (Dout) from a first core circuit (10) and operates in a transmitting mode according to the control signal. The output buffer circuit converts the data signal into an output signal at a first voltage level or a ground voltage level according to the data signal logic level and a supply voltage (VDDIO). The supply voltage is adjusted to pull up or pull down the first voltage level of the output signal.
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