PORTABLE DETECTION SYSTEM FOR ALLERGIC DISEASES
    1.
    发明申请
    PORTABLE DETECTION SYSTEM FOR ALLERGIC DISEASES 有权
    用于过敏性疾病的便携式检测系统

    公开(公告)号:US20130309134A1

    公开(公告)日:2013-11-21

    申请号:US13548788

    申请日:2012-07-13

    CPC classification number: G01N33/54373

    Abstract: A portable detection system for allergic diseases includes a filtration-based inspection module and a reader module. The filtration-based inspection module includes an FPW sensor and a liquid sample filtration apparatus, wherein the liquid sample filtration apparatus includes an injection opening, a passage module, a filtering membrane and a gathering aperture. The injection opening is in communication with the gathering aperture. The FPW sensor comprises a frame body, a carrier and a sensing chip having an accommodating slot in communication with the gathering aperture. The carrier comprises a plurality of conductive terminals, and the conductive terminals are electrically connected with the sensing chip. The reader module comprises a connection slot capable of being inserted by the conductive terminals of the carrier.

    Abstract translation: 用于过敏性疾病的便携式检测系统包括基于过滤的检查模块和读取器模块。 基于过滤的检查模块包括FPW传感器和液体样品过滤装置,其中液体样品过滤装置包括注射开口,通道模块,过滤膜和聚集孔。 注射开口与收集孔连通。 FPW传感器包括框架体,载体和具有与收集孔连通的容纳槽的感测芯片。 载体包括多个导电端子,并且导电端子与感测芯片电连接。 读取器模块包括能够被载体的导电端子插入的连接槽。

    THRESHOLD VOLTAGE DETECTION CIRCUIT
    2.
    发明申请
    THRESHOLD VOLTAGE DETECTION CIRCUIT 失效
    阈值电压检测电路

    公开(公告)号:US20120319670A1

    公开(公告)日:2012-12-20

    申请号:US13194283

    申请日:2011-07-29

    Abstract: A threshold voltage detection circuit comprises a first inverter, a first transistor, a second transistor, a third transistor and a fourth transistor. The first inverter comprises a first terminal and a second terminal, a first electrode of the first transistor is electrically connected with the second terminal of the first inverter, a fourth electrode of the second transistor is electrically connected with the first terminal of the first inverter, a seventh electrode of the third transistor is electrically connected with the second terminal of the first inverter and the first electrode of the first transistor, a tenth electrode of the fourth transistor is electrically connected with a third electrode of the first transistor and a fifth electrode of the second transistor, and an eleventh electrode of the fourth transistor is electrically connected with a ninth electrode of the third transistor.

    Abstract translation: 阈值电压检测电路包括第一反相器,第一晶体管,第二晶体管,第三晶体管和第四晶体管。 第一反相器包括第一端子和第二端子,第一晶体管的第一电极与第一反相器的第二端子电连接,第二晶体管的第四电极与第一反相器的第一端子电连接, 第三晶体管的第七电极与第一反相器的第二端子和第一晶体管的第一电极电连接,第四晶体管的第十电极与第一晶体管的第三电极电连接,第五电极的第五电极 第二晶体管和第四晶体管的第十一电极与第三晶体管的第九电极电连接。

    LOW DROPOUT REGULATOR
    3.
    发明申请
    LOW DROPOUT REGULATOR 有权
    低压差调节器

    公开(公告)号:US20110062922A1

    公开(公告)日:2011-03-17

    申请号:US12685962

    申请日:2010-01-12

    CPC classification number: G05F1/56 G05F1/575

    Abstract: The present invention relates to a low dropout regulator, and more particularly to a low dropout regulator without load capacitor and ESR (equivalent series resistance) designed in response to the discharge curve of a Li-ion battery, includes an input terminal, a reference circuit, a power transfer element, a level regulating device, a regulating circuit, and a first N-type MOSFET. The regulating circuit detects a load change at an output terminal, amplifies the load change, and couples it to the level regulating device. The level regulating device receives and boosts a received signal and transmits the received signal to the power transfer element, so as to achieve the effect of controlling the power of a power supply.

    Abstract translation: 低压差稳压器技术领域本发明涉及一种低压降稳压器,特别涉及一种无负载电容器的低压差稳压器和响应于锂离子电池的放电曲线设计的ESR(等效串联电阻),包括输入端子,参考电路 功率传递元件,电平调节器件,调节电路和第一N型MOSFET。 调节电路检测输出端子的负载变化,放大负载变化,并将其耦合到电平调节装置。 电平调节装置接收并升高接收的信号,并将接收的信号发送到电力传输元件,以实现控制电源的功率的效果。

    Input output device for mixed-voltage tolerant
    4.
    发明授权
    Input output device for mixed-voltage tolerant 有权
    输入输出设备,耐混电压

    公开(公告)号:US07812638B2

    公开(公告)日:2010-10-12

    申请号:US12184271

    申请日:2008-08-01

    CPC classification number: H03K19/00315

    Abstract: An input output device coupled between a core circuit and a pad and including an output cell, an input cell, and a pre-driver. The output cell includes an output stage and a voltage level converter. The output stage includes a first transistor and a second transistor connected to the first transistor in serial between a first supply voltage and a second voltage. The voltage level converter generates a first gate voltage to the first transistor according to the first voltage and a data signal. When the first supply voltage is increased, the first gate voltage is increased. When the data signal is at a high level, the first transistor is turned on. The input cell includes a pull unit and a first N-type transistor. The pre-driver turns off the first and the second transistors.

    Abstract translation: 耦合在核心电路和焊盘之间并包括输出单元,输入单元和预驱动器的输入输出设备。 输出单元包括输出级和电压电平转换器。 输出级包括在第一电源电压和第二电压之间串联连接到第一晶体管的第一晶体管和第二晶体管。 电压电平转换器根据第一电压和数据信号产生到第一晶体管的第一栅极电压。 当第一电源电压增加时,第一栅极电压增加。 当数据信号处于高电平时,第一晶体管导通。 输入单元包括拉单元和第一N型晶体管。 预驱动器关闭第一和第二晶体管。

    Digital phase-locked loop circuit and a method thereof
    5.
    发明授权
    Digital phase-locked loop circuit and a method thereof 失效
    数字锁相环电路及其方法

    公开(公告)号:US07634037B2

    公开(公告)日:2009-12-15

    申请号:US11179847

    申请日:2005-07-12

    CPC classification number: H03L7/085

    Abstract: A method and a circuit for resolving the out-of-phase problem between a color burst signal and a sub-carrier signal of a television system. A delay means is used which leads to the synchronization of the color burst signal and the sub-carrier signal such that a subsequent color demodulator can demodulate correct color signals. Therefore, the locking of the two signals will be fastened without any excessively large circuit hardware.

    Abstract translation: 一种用于解决电视系统的色同步信号和副载波信号之间的异相问题的方法和电路。 使用延迟装置,其导致色同步信号和副载波信号的同步,使得随后的色彩解调器可以解调正确的颜色信号。 因此,两个信号的锁定将被紧固而没有任何过大的电路硬件。

    Motion detection circuit and method
    6.
    发明授权
    Motion detection circuit and method 有权
    运动检测电路及方法

    公开(公告)号:US07394503B2

    公开(公告)日:2008-07-01

    申请号:US11171995

    申请日:2005-06-30

    CPC classification number: H04N9/78

    Abstract: Successive video signals of a first frame and a second frame are received. A signal difference between the video signals is determined and filtered to obtain a luminance difference. A signal sum of the video signals is determined and filtered to obtain a luminance sum. The luminance sum is subtracted from the signal sum to obtain a chrominance difference.

    Abstract translation: 接收第一帧和第二帧的连续视频信号。 确定并滤波视频信号之间的信号差以获得亮度差。 确定并滤波视频信号的信号和以获得亮度和。 从信号和中减去亮度和,以获得色度差。

    Low dropout regulator
    7.
    发明授权
    Low dropout regulator 有权
    低压差稳压器

    公开(公告)号:US08692528B2

    公开(公告)日:2014-04-08

    申请号:US12685962

    申请日:2010-01-12

    CPC classification number: G05F1/56 G05F1/575

    Abstract: The present invention relates to a low dropout regulator, and more particularly to a low dropout regulator without load capacitor and ESR (equivalent series resistance) designed in response to the discharge curve of a Li-ion battery, includes an input terminal, a reference circuit, a power transfer element, a level regulating device, a regulating circuit, and a first N-type MOSFET. The regulating circuit detects a load change at an output terminal, amplifies the load change, and couples it to the level regulating device. The level regulating device receives and boosts a received signal and transmits the received signal to the power transfer element, so as to achieve the effect of controlling the power of a power supply.

    Abstract translation: 低压差稳压器技术领域本发明涉及一种低压降稳压器,特别涉及一种无负载电容器的低压差稳压器和响应于锂离子电池的放电曲线设计的ESR(等效串联电阻),包括输入端子,参考电路 功率传递元件,电平调节器件,调节电路和第一N型MOSFET。 调节电路检测输出端子的负载变化,放大负载变化,并将其耦合到电平调节装置。 电平调节装置接收并升高接收的信号,并将接收的信号发送到电力传输元件,以实现控制电源的功率的效果。

    ESD protection circuit
    8.
    发明授权
    ESD protection circuit 失效
    ESD保护电路

    公开(公告)号:US08498085B2

    公开(公告)日:2013-07-30

    申请号:US13589285

    申请日:2012-08-20

    CPC classification number: H02H9/046

    Abstract: An ESD protection circuit with leakage current reduction function includes a silicon controlled rectifier, a first CMOS inverter, a first transistor, a current mirror, a PMOS capacitor and a resistor. The first CMOS inverter electrically connects with the silicon controlled rectifier. The first transistor comprises a first end, a second end and a third end, wherein the first end electrically connects with the silicon controlled rectifier and the first CMOS inverter, and the current mirror electrically connects with the third end of the first transistor. The PMOS capacitor electrically connects with the current mirror, and the resistor electrically connects with the first CMOS inverter, the second end of the first transistor and the PMOS capacitor.

    Abstract translation: 具有泄漏电流降低功能的ESD保护电路包括可控硅整流器,第一CMOS反相器,第一晶体管,电流镜,PMOS电容器和电阻器。 第一个CMOS反相器与可控硅整流器电连接。 第一晶体管包括第一端,第二端和第三端,其中第一端与可控硅整流器和第一CMOS反相器电连接,并且电流镜与第一晶体管的第三端电连接。 PMOS电容器与电流镜电连接,并且电阻器与第一CMOS反相器,第一晶体管的第二端和PMOS电容器电连接。

    Output buffer with process and temperature compensation
    9.
    发明授权
    Output buffer with process and temperature compensation 失效
    输出缓冲器,具有过程和温度补偿

    公开(公告)号:US08421506B2

    公开(公告)日:2013-04-16

    申请号:US12845231

    申请日:2010-07-28

    CPC classification number: H03K19/00384 G01R31/31715

    Abstract: An output buffer with process and temperature compensation comprises an enable terminal, a clock generator, a PMOS threshold voltage detector, an NMOS threshold voltage detector, a first comparator, a second comparator, a first compensation code generator, a second compensation code generator and an output buffer stage, wherein the output buffer stage has an output stage, the output buffer stage means for controlling a drive current generated by the output stage, wherein the output stage has a first voltage output terminal, and the modulated drive current is capable of compensating slew rate of the first voltage output terminal.

    Abstract translation: 具有过程和温度补偿的输出缓冲器包括使能端子,时钟发生器,PMOS阈值电压检测器,NMOS阈值电压检测器,第一比较器,第二比较器,第一补偿代码发生器,第二补偿代码发生器和 输出缓冲级,其中输出缓冲级具有输出级,输出缓冲级装置,用于控制由输出级产生的驱动电流,其中输出级具有第一电压输出端,并且调制驱动电流能够补偿 第一个电压输出端的转换速率。

    Threshold voltage detection circuit
    10.
    发明授权
    Threshold voltage detection circuit 失效
    阈值电压检测电路

    公开(公告)号:US08339171B1

    公开(公告)日:2012-12-25

    申请号:US13194283

    申请日:2011-07-29

    Abstract: A threshold voltage detection circuit comprises a first inverter, a first transistor, a second transistor, a third transistor and a fourth transistor. The first inverter comprises a first terminal and a second terminal, a first electrode of the first transistor is electrically connected with the second terminal of the first inverter, a fourth electrode of the second transistor is electrically connected with the first terminal of the first inverter, a seventh electrode of the third transistor is electrically connected with the second terminal of the first inverter and the first electrode of the first transistor, a tenth electrode of the fourth transistor is electrically connected with a third electrode of the first transistor and a fifth electrode of the second transistor, and an eleventh electrode of the fourth transistor is electrically connected with a ninth electrode of the third transistor.

    Abstract translation: 阈值电压检测电路包括第一反相器,第一晶体管,第二晶体管,第三晶体管和第四晶体管。 第一反相器包括第一端子和第二端子,第一晶体管的第一电极与第一反相器的第二端子电连接,第二晶体管的第四电极与第一反相器的第一端子电连接, 第三晶体管的第七电极与第一反相器的第二端子和第一晶体管的第一电极电连接,第四晶体管的第十电极与第一晶体管的第三电极电连接,第五电极的第五电极 第二晶体管和第四晶体管的第十一电极与第三晶体管的第九电极电连接。

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