发明申请
- 专利标题： SEMICONDUCTOR DEVICE
- 专利标题（中）： 半导体器件
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申请号： US12808473申请日： 2008-11-11
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公开(公告)号： US20100289076A1公开(公告)日： 2010-11-18
- 发明人: Shuichi Nishida , Toyokazu Ohnishi , Tomoyuki Shoji
- 申请人： Shuichi Nishida , Toyokazu Ohnishi , Tomoyuki Shoji
- 优先权： JP2007-330404 20071221
- 国际申请： PCT/JP2008/070474 WO 20081111
- 主分类号： H01L29/78
- IPC分类号： H01L29/78
摘要：
A technique is presented for further reducing on-resistance (or on-voltage) in a vertical semiconductor device provided with a carrier shielding layer.A semiconductor substrate 20 of a semiconductor device 10 comprises a channel section 10A and a non-channel section 10B. An emitter region 26 is formed in the channel section 10A, this emitter region 26 making contact with a side surface of a trench gate 30 and being electrically connected to an emitter electrode 28. The emitter region 26 is not formed in a body region 25 of the non-channel section 10B. In a plan view, an occupied area ratio of the area which a carrier shielding layer 52 located in the non-channel section 10B occupies within the non-channel section 10B is larger than an occupied area ratio of the area which the carrier shielding layer 52 located in the channel section 10A occupies within the channel section 10A.
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