发明申请
- 专利标题： FABRICATION METHOD OF SEMICONDUCTOR INTEGRATED CIRCUIT DEVICE
- 专利标题（中）： 半导体集成电路器件的制造方法
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申请号： US12853360申请日： 2010-08-10
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公开(公告)号： US20100304510A1公开(公告)日： 2010-12-02
- 发明人: Masayoshi OKAMOTO , Yoshiaki Hasegawa , Yasuhiro Motoyama , Hideyuki Matsumoto , Shingo Yorisaki , Akio Hasebe , Ryuji Shibata , Yasunori Narizuka , Akira Yabushita , Toshiyuki Majima
- 申请人： Masayoshi OKAMOTO , Yoshiaki Hasegawa , Yasuhiro Motoyama , Hideyuki Matsumoto , Shingo Yorisaki , Akio Hasebe , Ryuji Shibata , Yasunori Narizuka , Akira Yabushita , Toshiyuki Majima
- 优先权： JP2003-371515 20031031; JP2003-372323 20031031
- 主分类号： H01L21/66
- IPC分类号： H01L21/66
摘要：
To permit electrical testing of a semiconductor integrated circuit device having test pads disposed at narrow pitches probes in a pyramid or trapezoidal pyramid form are formed from metal films formed by stacking a rhodium film and a nickel film successively. Via through-holes are formed in a polyimide film between interconnects and the metal films, and the interconnects are electrically connected to the metal films. A plane pattern of one of the metal films equipped with one probe and through-hole is obtained by turning a plane pattern of the other metal film equipped with the other probe and through-hole through a predetermined angle.
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