公开(公告)号：US20100301884A1

公开(公告)日：2010-12-02

申请号：US12787869

申请日：2010-05-26

申请人： Etsuko Takane ,  Yasunori Narizuka ,  Akira Yabushita ,  Kenji Kawakami ,  Akio Hasebe

发明人： Etsuko Takane ,  Yasunori Narizuka ,  Akira Yabushita ,  Kenji Kawakami ,  Akio Hasebe

IPC分类号： G01R31/02 ,  H01R13/02 ,  H01R43/00

CPC分类号： H05K3/4007 ,  G01R1/06733 ,  G01R1/0735 ,  G01R3/00 ,  H05K3/06 ,  H05K3/205 ,  H05K2201/0367 ,  H05K2201/09845 ,  H05K2203/0574 ,  Y10T29/49224

摘要： A semiconductor chip inspection apparatus largely reduces occurrence of damage due to foreign matter in an inspection process and improves durability at the same time of miniaturization is provided. As to a highly accurate thin-film probe sheet which performs: a contact to electrode pads arranged at a narrow pitch and a high density along with integration of semiconductor chip; and an inspection of semiconductor chips, by providing two layers of metal films selectively removable in a step-like shape in a periphery region of fine contact terminal having sharp tips and arranged at a high density and a narrow pitch at the same level as electrode pads, an upper periphery of the contact terminals is covered with an insulating film, and a large space region is formed.

摘要翻译： 半导体芯片检查装置大大减少了检查过程中由于异物引起的损坏的发生，并提供了同时小型化的耐久性。 对于高精度的薄膜探针片，其执行：与半导体芯片的集成一起以窄间距和高密度布置的电极焊盘的接触; 以及对半导体芯片的检查，通过在具有尖锐尖端的精细接触端子的周边区域中提供两级可选择性地以阶梯状形式移除的金属膜，并以与电极焊盘相同的高度密度和窄间距排列 接触端子的上周边被绝缘膜覆盖，形成大的空间区域。

公开(公告)号：US20070218572A1

公开(公告)日：2007-09-20

申请号：US11750371

申请日：2007-05-18

申请人： Yuji Wada ,  Susumu Kasukabe ,  Takehiko Hasebe ,  Yasunori Narizuka ,  Akira Yabushita ,  Terutaka Mori ,  Akio Hasebe ,  Yasuhiro Motoyama ,  Teruo Shoji ,  Masakazu Sueyoshi

发明人： Yuji Wada ,  Susumu Kasukabe ,  Takehiko Hasebe ,  Yasunori Narizuka ,  Akira Yabushita ,  Terutaka Mori ,  Akio Hasebe ,  Yasuhiro Motoyama ,  Teruo Shoji ,  Masakazu Sueyoshi

IPC分类号： H01L21/66

CPC分类号： G01R1/07314 ,  G01R31/2872 ,  Y10T29/41 ,  Y10T29/49128 ,  Y10T29/49147 ,  Y10T29/49155 ,  Y10T29/49169 ,  Y10T29/49798

摘要： The fabrication of a semiconductor integrated circuit device involves testing using a pushing mechanism that is constructed by forming, over the upper surface of a thin film probe, a reinforcing material having a linear expansion coefficient (thermal expansion coefficient) almost equal to that of a wafer to be tested; forming a groove in the reinforcing material above a contact terminal; placing an elastomer in the groove so that a predetermined amount projects out of the groove; and disposing a pusher and another elastomer to sandwich the pusher between the elastomers. With the use of such a probe, it is possible to improve the throughput of wafer-level electrical testing of a semiconductor integrated circuit.

摘要翻译： 半导体集成电路器件的制造包括使用推压机构进行测试，所述推压机构通过在薄膜探针的上表面上形成具有几乎等于晶片的线性膨胀系数（热膨胀系数）的增强材料而构成 待测 在接触端子上方的增强材料中形成凹槽; 将弹性体放置在所述槽中，使得预定量突出到所述凹槽中; 并且设置推进器和另一种弹性体以将推进器夹在弹性体之间。 通过使用这样的探针，可以提高半导体集成电路的晶片级电气测试的吞吐量。

公开(公告)号：US20110136272A1

公开(公告)日：2011-06-09

申请号：US13019166

申请日：2011-02-01

申请人： Masayoshi OKAMOTO ,  Yoshiaki HASEGAWA ,  Yasuhiro MOTOYAMA ,  Hideyuki MATSUMOTO ,  Shingo YORISAKI ,  Akio HASEBE ,  Ryuji SHIBATA ,  Yasunori NARIZUKA ,  Akira YABUSHITA ,  Toshiyuki MAJIMA

发明人： Masayoshi OKAMOTO ,  Yoshiaki HASEGAWA ,  Yasuhiro MOTOYAMA ,  Hideyuki MATSUMOTO ,  Shingo YORISAKI ,  Akio HASEBE ,  Ryuji SHIBATA ,  Yasunori NARIZUKA ,  Akira YABUSHITA ,  Toshiyuki MAJIMA

IPC分类号： H01L21/66

CPC分类号： H01L22/14 ,  G01R1/06711 ,  G01R1/06744 ,  G01R1/07307 ,  G01R3/00 ,  H01L2224/05553 ,  H01L2224/05554 ,  H01L2224/0603 ,  H01L2224/45144 ,  H01L2224/48453 ,  H01L2224/48463 ,  H01L2224/49171 ,  H01L2924/014 ,  H01L2924/3011 ,  H01L2924/00

摘要： To permit electrical testing of a semiconductor integrated circuit device having test pads disposed at narrow pitches probes in a pyramid or trapezoidal pyramid form are formed from metal films formed by stacking a rhodium film and a nickel film successively. Via through-holes are formed in a polyimide film between interconnects and the metal films, and the interconnects are electrically connected to the metal films. A plane pattern of one of the metal films equipped with one probe and through-hole is obtained by turning a plane pattern of the other metal film equipped with the other probe and through-hole through a predetermined angle.

摘要翻译： 为了允许具有金字塔或梯形金字塔形式的窄间距探针设置的测试焊盘的半导体集成电路器件进行电气测试，是由依次层叠铑膜和镍膜而形成的金属膜形成的。 在互连和金属膜之间的聚酰亚胺膜中形成通孔，并且互连电连接到金属膜。 通过将配备有另一个探针和通孔的另一金属膜的平面图案转过预定角度，获得装配有一个探针和通孔的金属膜之一的平面图案。

公开(公告)号：US07351597B2

公开(公告)日：2008-04-01

申请号：US11750371

申请日：2007-05-18

申请人： Yuji Wada ,  Susumu Kasukabe ,  Takehiko Hasebe ,  Yasunori Narizuka ,  Akira Yabushita ,  Terutaka Mori ,  Akio Hasebe ,  Yasuhiro Motoyama ,  Teruo Shoji ,  Masakazu Sueyoshi

发明人： Yuji Wada ,  Susumu Kasukabe ,  Takehiko Hasebe ,  Yasunori Narizuka ,  Akira Yabushita ,  Terutaka Mori ,  Akio Hasebe ,  Yasuhiro Motoyama ,  Teruo Shoji ,  Masakazu Sueyoshi

IPC分类号： H01L21/66

CPC分类号： G01R1/07314 ,  G01R31/2872 ,  Y10T29/41 ,  Y10T29/49128 ,  Y10T29/49147 ,  Y10T29/49155 ,  Y10T29/49169 ,  Y10T29/49798

摘要： The fabrication of a semiconductor integrated circuit device involves testing using a pushing mechanism that is constructed by forming, over the upper surface of a thin film probe, a reinforcing material having a linear expansion coefficient (thermal expansion coefficient) almost equal to that of a wafer to be tested; forming a groove in the reinforcing material above a contact terminal; placing an elastomer in the groove so that a predetermined amount projects out of the groove; and disposing a pusher and another elastomer to sandwich the pusher between the elastomers. With the use of such a probe, it is possible to improve the throughput of wafer-level electrical testing of a semiconductor integrated circuit.

摘要翻译： 半导体集成电路器件的制造包括使用推压机构进行测试，所述推压机构通过在薄膜探针的上表面上形成具有几乎等于晶片的线性膨胀系数（热膨胀系数）的增强材料而构成 待测 在接触端子上方的增强材料中形成凹槽; 将弹性体放置在所述槽中，使得预定量突出到所述凹槽中; 并且设置推进器和另一种弹性体以将推进器夹在弹性体之间。 通过使用这样的探针，可以提高半导体集成电路的晶片级电气测试的吞吐量。

公开(公告)号：US20060043593A1

公开(公告)日：2006-03-02

申请号：US11184980

申请日：2005-07-20

申请人： Terutaka Mori ,  Yasunori Narizuka ,  Akira Yabushita ,  Etsuko Takane ,  Akio Hasebe ,  Kenji Kawakami

发明人： Terutaka Mori ,  Yasunori Narizuka ,  Akira Yabushita ,  Etsuko Takane ,  Akio Hasebe ,  Kenji Kawakami

IPC分类号： H01L23/52

CPC分类号： G01R1/06711 ,  G01R1/06744 ,  G01R1/0735 ,  G01R3/00

摘要： In the connecting apparatus for inspecting the semiconductor chip, in which contact terminals are electrically connected to each of the plurality of electrode pads formed on the semiconductor chips, a part of metal projections in the shape of quadrangular pyramid which constitute the contact terminals is composed of insulator in the present invention. Therefore, the inspection of semiconductor chips performed by simultaneously transmitting high-speed signals to the plurality of minute electrode pads arranged at a narrow pitch on the semiconductor chips can be realized.

摘要翻译： 在用于检查半导体芯片的连接装置中，其中接触端子电连接到形成在半导体芯片上的多个电极焊盘中的每一个，构成接触端子的四角锥形状的金属突起的一部分由 绝缘体。 因此，可以实现通过同时向半导体芯片上以窄间距布置的多个微小电极焊盘传输高速信号而执行的半导体芯片的检查。

公开(公告)号：US06621217B2

公开(公告)日：2003-09-16

申请号：US10068939

申请日：2002-02-11

申请人： Masashi Nishiki ,  Ryohei Satoh ,  Yuzo Taniguchi ,  Shigeaki Suzuki ,  Michifumi Kawai ,  Masahito Ijuin ,  Akira Yabushita ,  Makoto Fukushima ,  Tomohiko Murase

发明人： Masashi Nishiki ,  Ryohei Satoh ,  Yuzo Taniguchi ,  Shigeaki Suzuki ,  Michifumi Kawai ,  Masahito Ijuin ,  Akira Yabushita ,  Makoto Fukushima ,  Tomohiko Murase

IPC分类号： H01J1749

CPC分类号： H05K3/062 ,  H01J9/02 ,  H01J11/12 ,  H01J11/22 ,  H01J11/24 ,  H01J2211/225 ,  H05K3/04 ,  H05K3/388 ,  H05K2201/0175 ,  H05K2201/0326 ,  H05K2203/025 ,  H05K2203/107

摘要： A gas discharge display device comprising a front side substrate having a plurality of first electrodes and a back side substrate having a plurality of second electrodes, wherein at least said first electrodes or second electrodes are formed by wet etching using a resist made of an inorganic material, is excellent in the ability to suppress the breakage of wiring in electrodes.

公开(公告)号：US06429586B1

公开(公告)日：2002-08-06

申请号：US09225552

申请日：1999-01-05

申请人： Masashi Nishiki ,  Ryohei Satoh ,  Yuzo Taniguchi ,  Shigeaki Suzuki ,  Michifumi Kawai ,  Masahito Ijuin ,  Akira Yabushita ,  Tomohiro Murase

发明人： Masashi Nishiki ,  Ryohei Satoh ,  Yuzo Taniguchi ,  Shigeaki Suzuki ,  Michifumi Kawai ,  Masahito Ijuin ,  Akira Yabushita ,  Tomohiro Murase

IPC分类号： H01J1749

CPC分类号： H01J9/241 ,  H01J9/02

摘要： A method of making a gas discharge display panel and a gas discharge display device using laser processing so that the manufacturing time to form wiring on a substrate thereof is significantly reduced. In order to achieve this, the gas discharge display panel is provided with a first substrate having a plurality of first electrodes and a plurality of second electrodes, and the first electrodes are laser processed to have a substantially rectangular shape. The second electrodes are formed on the first electrodes, and a second substrate having a plurality of third electrodes which is opposed to the first substrate is provided.

摘要翻译： 一种制造气体放电显示面板的方法和使用激光加工的气体放电显示装置，使得在其基板上形成布线的制造时间显着降低。 为了实现这一点，气体放电显示面板设置有具有多个第一电极和多个第二电极的第一基板，并且第一电极被激光处理以具有基本上矩形的形状。 第二电极形成在第一电极上，并且具有与第一基板相对的多个第三电极的第二基板。

公开(公告)号：US06261144B1

公开(公告)日：2001-07-17

申请号：US09164272

申请日：1998-10-01

申请人： Masashi Nishiki ,  Ryohei Satoh ,  Yuzo Taniguchi ,  Shigeaki Suzuki ,  Michifumi Kawai ,  Masahito Ijuin ,  Akira Yabushita ,  Makoto Fukushima ,  Tomohiko Murase

发明人： Masashi Nishiki ,  Ryohei Satoh ,  Yuzo Taniguchi ,  Shigeaki Suzuki ,  Michifumi Kawai ,  Masahito Ijuin ,  Akira Yabushita ,  Makoto Fukushima ,  Tomohiko Murase

IPC分类号： H01J900

CPC分类号： H05K3/062 ,  H01J9/02 ,  H01J11/12 ,  H01J11/22 ,  H01J11/24 ,  H01J2211/225 ,  H05K3/04 ,  H05K3/388 ,  H05K2201/0175 ,  H05K2201/0326 ,  H05K2203/025 ,  H05K2203/107

摘要： A gas discharge display device comprising a front side substrate having a plurality of first electrodes and a back side substrate having a plurality of second electrodes, wherein at least said first electrodes or second electrodes are formed by wet etching using a resist made of an inorganic material, is excellent in the ability to suppress the breakage of wiring in electrodes.

摘要翻译： 一种气体放电显示装置，包括具有多个第一电极的前侧基板和具有多个第二电极的背面基板，其中至少所述第一电极或第二电极通过使用由无机材料制成的抗蚀剂的湿蚀刻形成 能够抑制电极中的配线断裂的能力优异。

公开(公告)号：US20110175634A1

公开(公告)日：2011-07-21

申请号：US13075666

申请日：2011-03-30

申请人： Masayoshi Okamoto ,  Yoshiaki Hasegawa ,  Yasuhiro Motoyama ,  Hideyuki Matsumoto ,  Shingo Yorisaki ,  Akio Hasebe ,  Ryuji Shibata ,  Yasunori Narizuka ,  Akira Yabushita ,  Toshiyuki Majima

发明人： Masayoshi Okamoto ,  Yoshiaki Hasegawa ,  Yasuhiro Motoyama ,  Hideyuki Matsumoto ,  Shingo Yorisaki ,  Akio Hasebe ,  Ryuji Shibata ,  Yasunori Narizuka ,  Akira Yabushita ,  Toshiyuki Majima

IPC分类号： G01R31/3187 ,  G01R31/20

CPC分类号： H01L22/14 ,  G01R1/06711 ,  G01R1/06744 ,  G01R1/07307 ,  G01R3/00 ,  H01L2224/05553 ,  H01L2224/05554 ,  H01L2224/0603 ,  H01L2224/45144 ,  H01L2224/48453 ,  H01L2224/48463 ,  H01L2224/49171 ,  H01L2924/014 ,  H01L2924/3011 ,  H01L2924/00

摘要： To permit electrical testing of a semiconductor integrated circuit device having test pads disposed at narrow pitches probes in a pyramid or trapezoidal pyramid form are formed from metal films formed by stacking a rhodium film and a nickel film successively. Via through-holes are formed in a polyimide film between interconnects and the metal films, and the interconnects are electrically connected to the metal films. A plane pattern of one of the metal films equipped with one probe and through-hole is obtained by turning a plane pattern of the other metal film equipped with the other probe and through-hole through a predetermined angle.

公开(公告)号：US20100304510A1

公开(公告)日：2010-12-02

申请号：US12853360

申请日：2010-08-10

申请人： Masayoshi OKAMOTO ,  Yoshiaki Hasegawa ,  Yasuhiro Motoyama ,  Hideyuki Matsumoto ,  Shingo Yorisaki ,  Akio Hasebe ,  Ryuji Shibata ,  Yasunori Narizuka ,  Akira Yabushita ,  Toshiyuki Majima

发明人： Masayoshi OKAMOTO ,  Yoshiaki Hasegawa ,  Yasuhiro Motoyama ,  Hideyuki Matsumoto ,  Shingo Yorisaki ,  Akio Hasebe ,  Ryuji Shibata ,  Yasunori Narizuka ,  Akira Yabushita ,  Toshiyuki Majima

IPC分类号： H01L21/66

CPC分类号： H01L22/14 ,  G01R1/06711 ,  G01R1/06744 ,  G01R1/07307 ,  G01R3/00 ,  H01L2224/05553 ,  H01L2224/05554 ,  H01L2224/0603 ,  H01L2224/45144 ,  H01L2224/48453 ,  H01L2224/48463 ,  H01L2224/49171 ,  H01L2924/014 ,  H01L2924/3011 ,  H01L2924/00

摘要： To permit electrical testing of a semiconductor integrated circuit device having test pads disposed at narrow pitches probes in a pyramid or trapezoidal pyramid form are formed from metal films formed by stacking a rhodium film and a nickel film successively. Via through-holes are formed in a polyimide film between interconnects and the metal films, and the interconnects are electrically connected to the metal films. A plane pattern of one of the metal films equipped with one probe and through-hole is obtained by turning a plane pattern of the other metal film equipped with the other probe and through-hole through a predetermined angle.

摘要翻译： 为了允许具有金字塔或梯形金字塔形式的窄间距探针设置的测试焊盘的半导体集成电路器件进行电气测试，是由依次层叠铑膜和镍膜而形成的金属膜形成的。 在互连和金属膜之间的聚酰亚胺膜中形成通孔，并且互连电连接到金属膜。 通过将配备有另一个探针和通孔的另一金属膜的平面图案转过预定角度，获得装配有一个探针和通孔的金属膜之一的平面图案。