发明申请
- 专利标题： Multiple Orientation Nanowires With Gate Stack Stressors
- 专利标题（中）： 具有栅堆栈应力的多方向纳米线
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申请号： US12505580申请日： 2009-07-20
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公开(公告)号： US20110012176A1公开(公告)日： 2011-01-20
- 发明人: Dureseti CHIDAMBARRAO , Xiao Hu LIU , Lidija SEKARIC
- 申请人： Dureseti CHIDAMBARRAO , Xiao Hu LIU , Lidija SEKARIC
- 专利权人： International Business Machines Corporation
- 当前专利权人： International Business Machines Corporation
- 主分类号： H01L29/78
- IPC分类号： H01L29/78 ; H01L21/336
摘要：
An electronic device includes a conductive channel defining a crystal structure and having a length and a thickness tC; and a dielectric film of thickness tg in contact with a surface of the channel. Further, the film comprises a material that exerts one of a compressive or a tensile force on the contacted surface of the channel such that electrical mobility of the charge carriers (electrons or holes) along the channel length is increased due to the compressive or tensile force in dependence on alignment of the channel length relative to the crystal structure. Embodiments are given for chips with both hole and electron mobility increased in different transistors, and a method for making such a transistor or chip.
公开/授权文献
- US08368125B2 Multiple orientation nanowires with gate stack stressors 公开/授权日：2013-02-05
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