发明申请
US20110064150A1 PLL CIRCUIT WITH IMPROVED PHASE DIFFERENCE DETECTION 有权
具有改进的相位差检测的PLL电路

PLL CIRCUIT WITH IMPROVED PHASE DIFFERENCE DETECTION
摘要:
In an ADPLL composed of a digital circuit, a technique improving phase difference detection in a vicinity of a phase difference of 0 (zero) is provided. A feedback loop comprises a PFD comparing phases and frequencies of a reference signal and a feedback signal, a TDC converting an output of the PFD into a digital value, a DLF removing a high frequency noise component from an output of the TDC, a DCO controlled based on an output of the DLF and a DIV frequency-dividing an output the DCO and outputting the feedback signal. An offset value is added at any portion of the feedback loop, a phase of the feedback signal is controlled and a value other than 0 is inputted to the TDC even when the ADPLL is locked.
公开/授权文献
信息查询
0/0