发明申请
- 专利标题: SURFACE MOUNT FOOTPRINT IN-LINE CAPACITANCE
- 专利标题(中): 表面贴装内置电容
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申请号: US12612510申请日: 2009-11-04
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公开(公告)号: US20110104948A1公开(公告)日: 2011-05-05
- 发明人: Donald A. Girard, JR. , Mark W. Gailus , Philip T. Stokoe
- 申请人: Donald A. Girard, JR. , Mark W. Gailus , Philip T. Stokoe
- 申请人地址: US NH Nashua
- 专利权人: Amphenol Corporation
- 当前专利权人: Amphenol Corporation
- 当前专利权人地址: US NH Nashua
- 主分类号: H01R13/66
- IPC分类号: H01R13/66 ; H05K7/02 ; H05K3/34 ; H05K1/11 ; H05K1/16
摘要:
An interconnection system with capacitors integrated into a printed circuit board footprint of an electrical connector. One end of each capacitor shares a pad on the printed circuit board with a contact tail of a conductive element in a connector. The shared pads are not connected through vias to internal circuit structures. Rather, a via, such as which would conventionally be formed as part of the connector mounting pad, is formed as part of a separate, adjacent pad. A second end of the capacitor is attached to the adjacent pad, forming an electrical connection between the conductive element and the via through the capacitor. Incorporating capacitors into the footprint reduces the number of vias required, which improves signal integrity. The capacitors may be placed on the printed circuit board separately from the connector or may be incorporated into the connector, allowing the connector and capacitors to be placed in one operation.
公开/授权文献
- US08241067B2 Surface mount footprint in-line capacitance 公开/授权日:2012-08-14
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