发明申请
- 专利标题: Structure for Bumped Wafer Test
- 专利标题(中): 冲击晶片测试结构
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申请号: US13019643申请日: 2011-02-02
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公开(公告)号: US20110121295A1公开(公告)日: 2011-05-26
- 发明人: Francis Heap Hoe Kuan , Byung Tai Do , Lee Huang Chew
- 申请人: Francis Heap Hoe Kuan , Byung Tai Do , Lee Huang Chew
- 申请人地址: SG Singapore
- 专利权人: STATS CHIPPAC, LTD.
- 当前专利权人: STATS CHIPPAC, LTD.
- 当前专利权人地址: SG Singapore
- 主分类号: H01L23/488
- IPC分类号: H01L23/488
摘要:
A semiconductor device includes a substrate having a first conductive layer disposed on a top surface of the substrate. A first insulation layer is formed over the substrate and contacts a sidewall of the first conductive layer. A second conductive layer is formed over the first insulation layer. The second conductive layer includes a first portion disposed over the first conductive layer and a second portion that extends beyond an end of the first conductive layer. A second insulation layer is formed over the second conductive layer. A first opening in the second insulation layer exposes the first portion of the second conductive layer. A second opening in the second insulation layer away from the first opening exposes the second portion of the second conductive layer. The second insulation layer is maintained around the first opening. A conductive bump is formed over the first portion of the second conductive layer.
公开/授权文献
- US08203145B2 Structure for bumped wafer test 公开/授权日:2012-06-19
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