发明申请
US20110182330A1 Serial cancellation receiver design for a coded signal processing engine
有权
编码信号处理引擎的串行消除接收机设计
- 专利标题: Serial cancellation receiver design for a coded signal processing engine
- 专利标题(中): 编码信号处理引擎的串行消除接收机设计
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申请号: US13076332申请日: 2011-03-30
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公开(公告)号: US20110182330A1公开(公告)日: 2011-07-28
- 发明人: Eric S. Olson , Anand P. Narayan , John K. Thomas
- 申请人: Eric S. Olson , Anand P. Narayan , John K. Thomas
- 申请人地址: US CA Sunnyvale
- 专利权人: RAMBUS INC.
- 当前专利权人: RAMBUS INC.
- 当前专利权人地址: US CA Sunnyvale
- 主分类号: H04B1/10
- IPC分类号: H04B1/10
摘要:
An interference cancelling receiver combines data from multiple paths after aligning to transmitter timing, and uses either an equalizer or a Rake receiver to compute symbol estimates. Interference estimates are generated from the symbol estimates, and multiple interference estimates are combined after re-aligning the interference estimates to receiver timing. At least two segments of symbol estimates are computed for each segment of interference cancelled data.Various techniques may be employed for controlling the latency and sequencing of these operations, and the subsystems within the canceller may use different processing clock speeds.