发明申请
- 专利标题: METHOD FOR FABRICATING A GATE STRUCTURE
- 专利标题(中): 制造门结构的方法
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申请号: US12720075申请日: 2010-03-09
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公开(公告)号: US20110223752A1公开(公告)日: 2011-09-15
- 发明人: Fung Ka HING , Haiting WANG , Han-Ting TSAI , Chun-Fai CHENG , Wei-Yuan LU , Hsien-Ching LO , Kuan-Chung CHEN
- 申请人: Fung Ka HING , Haiting WANG , Han-Ting TSAI , Chun-Fai CHENG , Wei-Yuan LU , Hsien-Ching LO , Kuan-Chung CHEN
- 申请人地址: TW Hsinchu
- 专利权人: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
- 当前专利权人: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
- 当前专利权人地址: TW Hsinchu
- 主分类号: H01L21/28
- IPC分类号: H01L21/28
摘要:
The present disclosure discloses an exemplary method for fabricating a gate structure comprising depositing and patterning a dummy oxide layer and a dummy gate electrode layer on a substrate; surrounding the dummy oxide layer and the dummy gate electrode layer with a sacrificial layer; surrounding the sacrificial layer with a nitrogen-containing dielectric layer; surrounding the nitrogen-containing dielectric layer with an interlayer dielectric layer; removing the dummy gate electrode layer; removing the dummy oxide layer; removing the sacrificial layer to form an opening in the nitrogen-containing dielectric layer; and depositing a gate dielectric; and depositing a gate electrode.
公开/授权文献
- US08535998B2 Method for fabricating a gate structure 公开/授权日:2013-09-17
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