According to one embodiment, a memory system includes a first memory that is nonvolatile, a second memory, and a controller that performs data transfer between a host device and the first memory by using the second memory. The controller caches data of each write command transmitted from the host device in the second memory, and performs a first transfer of transferring the data of each write command, which is cached in the second memory, to the first memory while leaving a beginning portion at a predetermined timing.