Invention Application
- Patent Title: METHOD FOR FABRICATING A GATE DIELECTRIC LAYER
- Patent Title (中): 用于制造栅极介电层的方法
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Application No.: US12760297Application Date: 2010-04-14
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Publication No.: US20110256731A1Publication Date: 2011-10-20
- Inventor: Wei-Yang LEE , Xiong-Fei YU , Jian-Hao CHEN , Cheng-Hao HOU , Da-Yuan LEE , Kuang-Yuan HSU
- Applicant: Wei-Yang LEE , Xiong-Fei YU , Jian-Hao CHEN , Cheng-Hao HOU , Da-Yuan LEE , Kuang-Yuan HSU
- Applicant Address: TW Hsinchu
- Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
- Current Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
- Current Assignee Address: TW Hsinchu
- Main IPC: H01L21/3105
- IPC: H01L21/3105 ; H01L21/316

Abstract:
A method for fabricating the gate dielectric layer comprises forming a high-k dielectric layer over a substrate; forming an oxygen-containing layer on the high-k dielectric layer by an atomic layer deposition process; and performing an inert plasma treatment on the oxygen-containing layer.
Public/Granted literature
- US08580698B2 Method for fabricating a gate dielectric layer Public/Granted day:2013-11-12
Information query
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