发明申请
- 专利标题： LOW POWER SCAN AND DELAY TEST METHOD AND APPARATUS
- 专利标题（中）： 低功耗扫描和延迟测试方法和设备
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申请号： US13198365申请日： 2011-08-04
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公开(公告)号： US20110289371A1公开(公告)日： 2011-11-24
- 发明人: Lee D. Whetsel , Joel J. Graber
- 申请人： Lee D. Whetsel , Joel J. Graber
- 申请人地址： US TX Dallas
- 专利权人： TEXAS INSTRUMENTS INCORPORATED
- 当前专利权人： TEXAS INSTRUMENTS INCORPORATED
- 当前专利权人地址： US TX Dallas
- 主分类号： G01R31/3177
- IPC分类号： G01R31/3177 ; G06F11/25
摘要：
Scan and Scan-BIST architectures are commonly used to test digital circuitry in integrated circuits. The present disclosure improves upon low power Scan and Scan-BIST methods. The improvement allows the low power Scan and Scan-BIST architectures to achieve a delay test capability equally as effective as the delay test capabilities used in conventional scan and Scan-BIST architectures.