Invention Application
- Patent Title: EEPROM CELL WITH CHARGE LOSS
- Patent Title (中): EEPROM电池充电损失
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Application No.: US12812533Application Date: 2008-12-31
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Publication No.: US20120068689A1Publication Date: 2012-03-22
- Inventor: Pascal Fornara
- Applicant: Pascal Fornara
- Applicant Address: FR Rousset
- Assignee: STMicroelectronics (Rousset) SAS
- Current Assignee: STMicroelectronics (Rousset) SAS
- Current Assignee Address: FR Rousset
- Priority: FR0850170 20080111
- International Application: PCT/FR08/52437 WO 20081231
- Main IPC: G01R19/00
- IPC: G01R19/00 ; H01L21/316 ; H01L21/318 ; H01L29/788
Abstract:
An EEPROM memory cell that includes a dual-gate MOS transistor in which the two gates are separated by an insulation layer, wherein the insulation layer includes a first portion and a second portion having lower insulation properties than the first one, the second portion being located at least partially above a channel area of the transistor.
Public/Granted literature
- US09165775B2 EEPROM cell with charge loss Public/Granted day:2015-10-20
Information query
