Invention Application
- Patent Title: DISABLING CACHE PORTIONS DURING LOW VOLTAGE OPERATIONS
- Patent Title (中): 在低电压运行期间禁用高速缓存部分
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Application No.: US13342016Application Date: 2011-12-31
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Publication No.: US20120110266A1Publication Date: 2012-05-03
- Inventor: Christopher Wilkerson , M. Muhammad Khellah , Vivek De , Ming Y. Zhang , Jaume Abella , Javier Carretero Casado , Pedro Chaparro Monferrer , Xavier Vera , Antonio Gonzalez
- Applicant: Christopher Wilkerson , M. Muhammad Khellah , Vivek De , Ming Y. Zhang , Jaume Abella , Javier Carretero Casado , Pedro Chaparro Monferrer , Xavier Vera , Antonio Gonzalez
- Main IPC: G06F12/08
- IPC: G06F12/08
Abstract:
Methods and apparatus relating to disabling one or more cache portions during low voltage operations are described. In some embodiments, one or more extra bits may be used for a portion of a cache that indicate whether the portion of the cache is capable at operating at or below Vccmin levels. Other embodiments are also described and claimed.
Public/Granted literature
- US08291168B2 Disabling cache portions during low voltage operations Public/Granted day:2012-10-16
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