Invention Application
- Patent Title: Seal Ring in an Integrated Circuit Die
- Patent Title (中): 集成电路模具中的密封环
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Application No.: US13351144Application Date: 2012-01-16
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Publication No.: US20120112322A1Publication Date: 2012-05-10
- Inventor: Chuan-Yi Lin , Ching-Chen Hao , Chen Cheng Chou , Sheng-Yuan Lin
- Applicant: Chuan-Yi Lin , Ching-Chen Hao , Chen Cheng Chou , Sheng-Yuan Lin
- Applicant Address: TW Hsin-Chu
- Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
- Current Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
- Current Assignee Address: TW Hsin-Chu
- Main IPC: H01L29/06
- IPC: H01L29/06

Abstract:
The formation of a seal ring in a semiconductor integrated circuit (IC) die is described. Through-silicon vias (TSVs) are typically formed in a semiconductor IC die to facilitate the formation of a three dimensional (3D) stacking die structure. The TSVs may be utilized to provide electrical connections between components in different dies of the 3D stacking die structure. A seal ring is formed in the inter-metal dielectric (IMD) layers of an IC die, enclosing an active circuit region. The real ring is formed prior to the formation of the TSVs, preventing moistures or other undesired chemical agents from diffusing into the active circuit region during the subsequent processes of forming TSVs.
Public/Granted literature
- US08742583B2 Seal ring in an integrated circuit die Public/Granted day:2014-06-03
Information query
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