Invention Application
- Patent Title: Method for fabricating semiconductor package
- Patent Title (中): 制造半导体封装的方法
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Application No.: US12930659Application Date: 2011-01-12
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Publication No.: US20120129315A1Publication Date: 2012-05-24
- Inventor: Yeh-Chang Hu , Chung-Tang Lin , Hui-Min Huang , Yih-Jenn Jiang , Shih-Kuang Chiu
- Applicant: Yeh-Chang Hu , Chung-Tang Lin , Hui-Min Huang , Yih-Jenn Jiang , Shih-Kuang Chiu
- Applicant Address: TW Taichung Hsien
- Assignee: SILICONWARE PRECISION INDUSTRIES CO., LTD.
- Current Assignee: SILICONWARE PRECISION INDUSTRIES CO., LTD.
- Current Assignee Address: TW Taichung Hsien
- Priority: TW099139658 20101118
- Main IPC: H01L21/50
- IPC: H01L21/50

Abstract:
A method for fabricating a semiconductor package includes the steps of: providing an alignment board having a plurality of openings and a plurality of alignment marks corresponding to the openings, respectively; disposing a plurality of chips on the alignment board at positions corresponding to the openings according to the alignment marks; pressing the alignment board with a carrier board having a soft layer disposed on one surface thereof so as to embed the chips in the soft layer of the carrier board; and removing the alignment board. As such, the positions of the chips are accurately positioned according to the alignment marks on the alignment board.
Information query
IPC分类: