Invention Application
- Patent Title: HIDDEN PLATING TRACES
- Patent Title (中): 隐藏的镀层
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Application No.: US13411308Application Date: 2012-03-02
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Publication No.: US20120164828A1Publication Date: 2012-06-28
- Inventor: Hem Takiar , Cheeman Yu , Ken Jian Ming Wang , Chin-Tien Chiu , Han-Shiao Chen , Chih-Chin Liao
- Applicant: Hem Takiar , Cheeman Yu , Ken Jian Ming Wang , Chin-Tien Chiu , Han-Shiao Chen , Chih-Chin Liao
- Main IPC: H01L21/3205
- IPC: H01L21/3205

Abstract:
A strengthened semiconductor die substrate and package are disclosed. The substrate may include contact fingers formed with nonlinear edges. Providing a nonlinear contour to the contact finger edges reduces the mechanical stress exerted on the semiconductor die which would otherwise occur with straight edges to the contact fingers. The substrate may additionally or alternatively include plating traces extending at an angle from the contact fingers. Extending at an angle, at least the ends of the plating traces at the edge of the substrate are covered beneath a lid in which the semiconductor package is encased. Thus, when in use with a host device, contact between the ends of the plating traces beneath the lid and contact pins of the host device is avoided.
Public/Granted literature
- US09209159B2 Hidden plating traces Public/Granted day:2015-12-08
Information query
IPC分类: