发明申请
- 专利标题: METHOD FOR FABRICATING TRENCH DMOS TRANSISTOR
- 专利标题(中): 用于制造TRENCH DMOS晶体管的方法
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申请号: US13394679申请日: 2010-09-26
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公开(公告)号: US20120178230A1公开(公告)日: 2012-07-12
- 发明人: Le Wang
- 申请人: Le Wang
- 申请人地址: CN Jiangsu CN Jiangsu
- 专利权人: CSMC TECHNOLOGIES FAB2 CO., LTD.,CSMC TECHNOLOGIES FAB1 CO., LTD.
- 当前专利权人: CSMC TECHNOLOGIES FAB2 CO., LTD.,CSMC TECHNOLOGIES FAB1 CO., LTD.
- 当前专利权人地址: CN Jiangsu CN Jiangsu
- 优先权: CN200910175076.7 20090927
- 国际申请: PCT/CN2010/077318 WO 20100926
- 主分类号: H01L21/336
- IPC分类号: H01L21/336
摘要:
A method for fabricating trench DMOS transistor includes: forming an oxide layer and a barrier layer with photolithography layout sequentially on a semiconductor substrate; etching the oxide layer and the semiconductor substrate with the barrier layer as a mask to form a trench; forming a gate oxide layer on the inner wall of the trench; forming a polysilicon layer on the barrier layer, filling up the trench; etching back the polysilicon layer with the barrier layer mask to remove the polysilicon layer on the barrier layer to form a trench gate; removing the barrier layer and the oxide layer; implanting ions into the semiconductor substrate on both sides of the trench gate to form a diffusion layer; coating a photoresist layer on the diffusion layer and defining a source/drain layout thereon; implanting ions into the diffusion layer based on the source/drain layout with the photoresist layer mask to form the source/drain; forming sidewalls on both the sides of the trench gate after removing the photoresist layer; and forming a metal silicide layer on the diffusion layer and the trench gate. Effective result of the present invention is achieved with lower cost and improved efficiency of fabrication.
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