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    Water toy
    1.
    外观设计
    Water toy 有权

    公开(公告)号：USD962386S1

    公开(公告)日：2022-08-30

    申请号：US29735843

    申请日：2020-05-26

    申请人： Le Wang

    设计人： Le Wang

    Metal-oxide-semiconductor field-effect transistor and method for manufacturing the same
    2.
    发明授权
    Metal-oxide-semiconductor field-effect transistor and method for manufacturing the same 有权
    金属氧化物半导体场效应晶体管及其制造方法

    公开(公告)号：US08803250B2

    公开(公告)日：2014-08-12

    申请号：US13807308

    申请日：2011-11-18

    申请人： Le Wang

    发明人： Le Wang

    IPC分类号： H01L29/02 ,  H01L29/66 ,  H01L29/78 ,  H01L29/10

    CPC分类号： H01L29/78 ,  H01L29/1033 ,  H01L29/66477 ,  H01L29/66651

    摘要： A Metal-Oxide-Semiconductor Field Effect Transistor (MOSFET) is disclosed. The MOSFET includes a substrate, a well region formed in the substrate, a shallow channel layer, a channel, a gate oxide layer, a gate region, a source region, and a drain region. The shallow channel layer is formed on a portion of the well region and includes a first shallow channel region and a second shallow channel region. The channel is arranged between the first shallow channel region and the second shallow channel region and connects the first shallow channel region and the second shallow channel region. Further, the gate oxide layer is formed on a portion of the well region between the first shallow channel region and the second shallow channel region and includes a first gate oxide region and a second gate oxide region arranged on different sides of the channel. The gate region is formed on the channel and the gate oxide layer; the source region is formed in the first shallow channel region and vertically extends into the well region under the first shallow channel region; and the drain region is formed in the second shallow channel region and vertically extends into the well region under the second shallow channel region.

    摘要翻译： 公开了一种金属氧化物半导体场效应晶体管（MOSFET）。 MOSFET包括衬底，形成在衬底中的阱区，浅沟道层，沟道，栅极氧化物层，栅极区，源极区和漏极区。 浅沟道层形成在阱区的一部分上，并且包括第一浅沟道区和第二浅沟道区。 通道布置在第一浅沟道区域和第二浅沟道区域之间，并且连接第一浅沟道区域和第二浅沟道区域。 此外，栅极氧化层形成在第一浅沟道区域和第二浅沟道区域之间的阱区域的一部分上，并且包括布置在沟道的不同侧上的第​​一栅极氧化物区域和第二栅极氧化物区域。 栅极区形成在沟道和栅极氧化物层上; 源极区域形成在第一浅沟道区域中并垂直延伸到第一浅沟道区域下方的阱区域中; 并且所述漏极区域形成在所述第二浅沟道区域中并且垂直延伸到所述第二浅沟道区域下方的阱区域中。

    Compatible vertical double diffused metal oxide semiconductor transistor and lateral double diffused metal oxide semiconductor transistor and manufacture method thereof
    3.
    发明授权
    Compatible vertical double diffused metal oxide semiconductor transistor and lateral double diffused metal oxide semiconductor transistor and manufacture method thereof 有权
    兼容的垂直双扩散金属氧化物半导体晶体管和横向双扩散金属氧化物半导体晶体管及其制造方法

    公开(公告)号：US08530961B2

    公开(公告)日：2013-09-10

    申请号：US13384002

    申请日：2010-10-26

    申请人： Linchun Gui ,  Le Wang ,  Zhiyong Zhao ,  Lili He

    发明人： Linchun Gui ,  Le Wang ,  Zhiyong Zhao ,  Lili He

    IPC分类号： H01L29/66 ,  H01L21/336

    CPC分类号： H01L29/66712 ,  H01L21/823418 ,  H01L21/823487 ,  H01L21/8249 ,  H01L27/088 ,  H01L29/0847 ,  H01L29/42368 ,  H01L29/66659 ,  H01L29/7809 ,  H01L29/7835

    摘要： A method for manufacturing compatible vertical double diffused metal oxide semiconductor (VDMOS) transistor and lateral double diffused metal oxide semiconductor (LDMOS) transistor includes: providing a substrate having an LDMOS transistor region and a VDMOS transistor region; forming an N-buried region in the substrate; forming an epitaxial layer on the N-buried layer region; forming isolation regions in the LDMOS transistor region and the VDMOS transistor region; forming a drift region in the LDMOS transistor region; forming gates in the LDMOS transistor region and the VDMOS transistor region; forming PBODY regions in the LDMOS transistor region and the VDMOS transistor region; forming an N-type GRADE region in the LDMOS transistor region; forming an NSINK region in the VDMOS transistor region, where the NSINK region is in contact with the N-buried layer region; forming sources and drains in the LDMOS transistor region and the VDMOS transistor region; and forming a P+ region in the LDMOS transistor region, where the P+ region is in contact with the source.

    摘要翻译： 制造兼容的垂直双扩散金属氧化物半导体（VDMOS）晶体管和横向双扩散金属氧化物半导体（LDMOS）晶体管的方法包括：提供具有LDMOS晶体管区域和VDMOS晶体管区域的衬底; 在所述衬底中形成N掩埋区域; 在N掩埋层区域上形成外延层; 在LDMOS晶体管区域和VDMOS晶体管区域中形成隔离区域; 在LDMOS晶体管区域中形成漂移区; 在LDMOS晶体管区域和VDMOS晶体管区域中形成栅极; 在LDMOS晶体管区域和VDMOS晶体管区域中形成PBODY区域; 在LDMOS晶体管区域中形成N型GRADE区域; 在所述VDMOS晶体管区域中形成NSINK区域，其中所述NSINK区域与所述N埋层区域接触; 在LDMOS晶体管区域和VDMOS晶体管区域中形成源极和漏极; 以及在LDMOS晶体管区域中形成P +区域，其中P +区域与源极接触。

    Methods and Apparatuses for Parallel Decoding and Data Processing of Turbo Codes
    8.
    发明申请
    Methods and Apparatuses for Parallel Decoding and Data Processing of Turbo Codes 审中-公开
    Turbo码并行解码和数据处理的方法与装置

    公开(公告)号：US20090172495A1

    公开(公告)日：2009-07-02

    申请号：US12344302

    申请日：2008-12-26

    申请人： Le Wang ,  Hongwen Yang ,  Hong Kui Yang

    发明人： Le Wang ,  Hongwen Yang ,  Hong Kui Yang

    IPC分类号： H03M13/05 ,  G06F11/10

    CPC分类号： H03M13/2987 ,  H03M13/2957 ,  H03M13/3966 ,  H03M13/3972

    摘要： Methods and apparatuses for parallel decoding and data processing of Turbo codes are provided. The method includes: a codeword dividing step for dividing a whole codeword into Q sub-blocks to form a plurality of boundaries between adjacent sub-blocks of the Q sub-blocks so as to decode the Q sub-blocks, wherein the decoding process comprises P times of decoding iterations, and wherein Q is a positive integer and Q>1 and P is a positive integer and P>1; and a boundary moving step for moving at least one position of the boundaries formed in a pth decoding iteration by an offset Δ before performing a (p+n)th decoding iteration, wherein p is a positive integer and 1≦p

    摘要翻译： 提供Turbo码并行解码和数据处理的方法和装置。 该方法包括：码字分割步骤，用于将整个码字划分为Q个子块，以在Q个子块的相邻子块之间形成多个边界，以对Q个子块进行解码，其中解码过程包括 P次解码迭代，其中Q是正整数，Q> 1，P是正整数，P> 1; 以及边界移动步骤，用于在执行第（p + n）个解码迭代之前将形成在第p解码迭代中的边界的至少一个位置移动偏移量Δt，其中p是正整数，1 <= p