发明申请
- 专利标题: THIN FILM TRANSISTOR ARRAY PANEL
- 专利标题(中): 薄膜晶体管阵列
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申请号: US13243649申请日: 2011-09-23
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公开(公告)号: US20120181533A1公开(公告)日: 2012-07-19
- 发明人: Hyeong Suk YOO , Joo-Han KIM , Je Hun LEE , Seong-Hun KIM , Jung Kyu LEE , Chang Oh JEONG
- 申请人: Hyeong Suk YOO , Joo-Han KIM , Je Hun LEE , Seong-Hun KIM , Jung Kyu LEE , Chang Oh JEONG
- 申请人地址: KR Suwon-si
- 专利权人: SAMSUNG ELECTRONICS CO., LTD.
- 当前专利权人: SAMSUNG ELECTRONICS CO., LTD.
- 当前专利权人地址: KR Suwon-si
- 优先权: KR10-2011-0005482 20110119
- 主分类号: H01L29/786
- IPC分类号: H01L29/786 ; H01L29/24 ; H01L29/04 ; H01L29/22 ; H01L21/44
摘要:
A thin film transistor array panel includes: an substrate; a gate line positioned on the substrate; a data line intersecting the gate line; a thin film transistor connected to the gate line and the data line; a gate insulating layer between the gate electrode of the thin film transistor and the semiconductor of the thin film transistor; a pixel electrode connected to the thin film transistor; and a passivation layer positioned between the pixel electrode and the thin film transistor, wherein at least one of the gate insulating layer and the passivation layer includes a silicon nitride layer, and the silicon nitride layer includes hydrogen content at less than 2×1022 cm3 or 4 atomic %.
公开/授权文献
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