Invention Application
US20120189079A1 LOW DENSITY PARITY CHECK (LDPC) CODING FOR A 32k MODE INTERLEAVER IN A DIGITAL VIDEO BROADCASTING (DVB) STANDARD
有权
用于数字视频广播(DVB)标准的32k模式交互器的低密度奇偶校验(LDPC)编码
- Patent Title: LOW DENSITY PARITY CHECK (LDPC) CODING FOR A 32k MODE INTERLEAVER IN A DIGITAL VIDEO BROADCASTING (DVB) STANDARD
- Patent Title (中): 用于数字视频广播(DVB)标准的32k模式交互器的低密度奇偶校验(LDPC)编码
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Application No.: US13359928Application Date: 2012-01-27
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Publication No.: US20120189079A1Publication Date: 2012-07-26
- Inventor: Matthew Paul Athol TAYLOR , Samuel Asanbeng Atungsiri , Takashi Yokokawa , Makiko Yamamoto
- Applicant: Matthew Paul Athol TAYLOR , Samuel Asanbeng Atungsiri , Takashi Yokokawa , Makiko Yamamoto
- Applicant Address: JP Minato-ku
- Assignee: Sony Corporation
- Current Assignee: Sony Corporation
- Current Assignee Address: JP Minato-ku
- Priority: GB0721269.9 20071030; GB0721270.7 20071030; GB0721271.5 20071030; GB0721272.3 20071030; GB0722645.9 20071119; GB0722728.3 20071120; JP2007-304689 20071126; JP2007-304690 20071126
- Main IPC: H03M13/05
- IPC: H03M13/05 ; H04L27/00

Abstract:
A data processing apparatus communicates data bits on a predetermined number of sub-carrier signals of an Orthogonal Frequency Division Multiplexed (OFDM) symbol. The data processing apparatus comprises a parity interleaver operable to perform parity interleaving on Low Density Parity Check (LDPC) encoded data bits obtained by performing LDPC encoding according to a parity check matrix of an LDPC code including a parity matrix corresponding to parity bits of the LDPC code, the parity matrix having a stepwise structure, so that a parity bit of the LDPC encoded data bits is interleaved to a different parity bit position. A mapping unit maps the parity interleaved bits onto data symbols corresponding to modulation symbols of a modulation scheme of the OFDM sub-carrier signals.
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