发明申请
- 专利标题： MANUFACTURING METHOD FOR SEMICONDUCTOR DEVICE, MANUFACTURING APPARATUS FOR SEMICONDUCTOR DEVICE, AND SEMICONDUCTOR DEVICE
- 专利标题（中）： 半导体器件的制造方法，半导体器件的制造装置和半导体器件
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申请号： US13351280申请日： 2012-01-17
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公开(公告)号： US20120217497A1公开(公告)日： 2012-08-30
- 发明人: Fumito Shoji , Noriteru Yamada
- 申请人： Fumito Shoji , Noriteru Yamada
- 申请人地址： JP Tokyo
- 专利权人： KABUSHIKI KAISHA TOSHIBA
- 当前专利权人： KABUSHIKI KAISHA TOSHIBA
- 当前专利权人地址： JP Tokyo
- 优先权： JP2011-042137 20110228
- 主分类号： H01L23/58
- IPC分类号： H01L23/58 ; B05C11/00 ; H01L21/66
摘要：
According to one embodiment, a manufacturing method for a semiconductor device includes: forming a test pattern with a metal film embedded therein through a plating process; detecting a characteristic of the test pattern; and adjusting a condition for the plating process based on the detected characteristic of the test pattern. The test pattern is formed over three or more wiring layers and includes a stacked via in an intermediate layer.
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