发明申请
- 专利标题： MANUFACTURING METHOD OF GATE DIELECTRIC LAYER
- 专利标题（中）： 门电介质层的制造方法
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申请号： US13092994申请日： 2011-04-25
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公开(公告)号： US20120270411A1公开(公告)日： 2012-10-25
- 发明人: Kuo-Hui Su , Yi-Nan Chen , Hsien-Wen Liu
- 申请人： Kuo-Hui Su , Yi-Nan Chen , Hsien-Wen Liu
- 申请人地址： TW Taoyuan
- 专利权人： NANYA TECHNOLOGY CORPORATION
- 当前专利权人： NANYA TECHNOLOGY CORPORATION
- 当前专利权人地址： TW Taoyuan
- 主分类号： H01L21/316
- IPC分类号： H01L21/316
摘要：
A manufacturing method of a gate dielectric layer is provided. An oxidation treatment is performed to form an oxide layer on a substrate. A nitridation treatment is performed to form a nitride layer on the oxide layer. An annealing treatment is performed in a mixing gas of N2 and O2, where the temperature of the annealing treatment is 900° C. to 950° C., the pressure of the annealing treatment is 5 Torr to 10 Torr, and the content ratio of the N2 to O2 is 0.5 to 0.8.
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