发明申请
US20120286338A1 CONTROL OF FLATBAND VOLTAGES AND THRESHOLD VOLTAGES IN HIGH-K METAL GATE STACKS AND STRUCTURES FOR CMOS DEVICES
有权
用于CMOS器件的高K金属栅极堆栈和结构中的平面电压和阈值电压的控制
- 专利标题： CONTROL OF FLATBAND VOLTAGES AND THRESHOLD VOLTAGES IN HIGH-K METAL GATE STACKS AND STRUCTURES FOR CMOS DEVICES
- 专利标题（中）： 用于CMOS器件的高K金属栅极堆栈和结构中的平面电压和阈值电压的控制
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申请号： US13550919申请日： 2012-07-17
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公开(公告)号： US20120286338A1公开(公告)日： 2012-11-15
- 发明人: Hemanth Jagannathan , Takashi Ando , Vijay Narayanan
- 申请人： Hemanth Jagannathan , Takashi Ando , Vijay Narayanan
- 申请人地址： US NY Armonk
- 专利权人： International Business Machines Corporation
- 当前专利权人： International Business Machines Corporation
- 当前专利权人地址： US NY Armonk
- 主分类号： H01L29/78
- IPC分类号： H01L29/78 ; H01L21/20
摘要：
A high-k metal gate stack and structures for CMOS devices and a method for forming the devices. The gate stack includes a high-k dielectric having a high dielectric constant greater than approximately 3.9, a germanium (Ge) material layer interfacing with the high-k dielectric, and a conductive electrode layer disposed above the high-k dielectric or the Ge material layer. The gate stack optimizes a shift of the flatband voltage or the threshold voltage to obtain high performance in p-FET devices.
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