发明申请
- 专利标题： FLEXIBLE INTERCONNECT PATTERN ON SEMICONDUCTOR PACKAGE
- 专利标题（中）： 半导体封装上的柔性互连图案
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申请号： US13556079申请日： 2012-07-23
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公开(公告)号： US20120289002A1公开(公告)日： 2012-11-15
- 发明人: Yoshihiro Tomita , David Chau , Gregory M. Chrysler , Devendra Natekar
- 申请人： Yoshihiro Tomita , David Chau , Gregory M. Chrysler , Devendra Natekar
- 申请人地址： US CA Santa Clara
- 专利权人： Intel Corporation
- 当前专利权人： Intel Corporation
- 当前专利权人地址： US CA Santa Clara
- 主分类号： H01L21/50
- IPC分类号： H01L21/50
摘要：
An embodiment of the present invention is a technique to fabricate a metal interconnect. A first metal trace is printed on a die attached to a substrate or a cavity of a heat spreader in a package to electrically connect the first metal trace to a power contact in the substrate. A device is mounted on the first metal trace. The device receives power from the substrate when the package is powered.
公开/授权文献
- US08409924B2 Flexible interconnect pattern on semiconductor package 公开/授权日：2013-04-02
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