发明申请
US20120309118A1 SILICON WAFER ALIGNMENT METHOD USED IN THROUGH-SILICON-VIA INTERCONNECTION 审中-公开
通过硅 - 互连方式使用的硅波对准方法

SILICON WAFER ALIGNMENT METHOD USED IN THROUGH-SILICON-VIA INTERCONNECTION
摘要:
A method of silicon wafer alignment used in through-silicon-via interconnection for use in the field of high-integrity packaging technology is disclosed. In one aspect, the method includes aligning and calibrating the upper and lower silicon wafers, stacked and interconnected electrically, so as to improve alignment accuracy of silicon wafers and reduce interconnection resistances. In some embodiments, the integrated circuit chip made by the method improves speed and energy performance.
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