Invention Application
US20120313172A1 SEMICONDUCTOR DEVICE, SEMICONDUCTOR WAFER, AND METHODS OF MANUFACTURING THE SAME
审中-公开
半导体器件,半导体器件及其制造方法
- Patent Title: SEMICONDUCTOR DEVICE, SEMICONDUCTOR WAFER, AND METHODS OF MANUFACTURING THE SAME
- Patent Title (中): 半导体器件,半导体器件及其制造方法
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Application No.: US13489128Application Date: 2012-06-05
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Publication No.: US20120313172A1Publication Date: 2012-12-13
- Inventor: Masaharu MATSUDAIRA , Toshiharu Nagumo , Hiroshi Takeda , Kiyoshi Takeuchi
- Applicant: Masaharu MATSUDAIRA , Toshiharu Nagumo , Hiroshi Takeda , Kiyoshi Takeuchi
- Assignee: Renesas Electronics Corporation
- Current Assignee: Renesas Electronics Corporation
- Priority: JP2011-127629 20110607
- Main IPC: H01L27/088
- IPC: H01L27/088 ; H01L21/762 ; H01L21/20 ; H01L29/02

Abstract:
This invention is to provide a semiconductor device having a reduced variation in the transistor characteristics. The semiconductor device has a SOI substrate, a first element isolation insulating layer, first and second conductivity type transistors, and first and second back gate contacts. The SOI substrate has a semiconductor substrate having first and second conductivity type layers, an insulating layer, and a semiconductor layer. The first element isolation insulating layer is buried in the SOI substrate, has a lower end reaching the first conductivity type layer, and isolates a first element region from a second element region. The first and second conductivity type transistors are located in the first and second element regions, respectively, and have respective channel regions formed in the semiconductor layer. The first and second back gate contacts are coupled to the second conductivity type layers in the first and second element regions, respectively.
Information query
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