发明申请
US20130015876A1 APPARATUS AND METHOD FOR MEASURING DEGRADATION OF CMOS VLSI ELEMENTS
有权
测量CMOS超大容量元素降解的装置和方法
- 专利标题: APPARATUS AND METHOD FOR MEASURING DEGRADATION OF CMOS VLSI ELEMENTS
- 专利标题(中): 测量CMOS超大容量元素降解的装置和方法
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申请号: US13183521申请日: 2011-07-15
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公开(公告)号: US20130015876A1公开(公告)日: 2013-01-17
- 发明人: Fang-Shi Jordan LAI , Chih-Cheng LU , Yung-Fu LIN , Hsu-Feng HSUEH , Chin-Hao CHANG , Cheng Yen WENG , Manoj M. MHALA
- 申请人: Fang-Shi Jordan LAI , Chih-Cheng LU , Yung-Fu LIN , Hsu-Feng HSUEH , Chin-Hao CHANG , Cheng Yen WENG , Manoj M. MHALA
- 申请人地址: TW Science-Based Industrial Park
- 专利权人: Taiwan Semiconductor Manufacturing Co., Ltd.
- 当前专利权人: Taiwan Semiconductor Manufacturing Co., Ltd.
- 当前专利权人地址: TW Science-Based Industrial Park
- 主分类号: G01R31/26
- IPC分类号: G01R31/26
摘要:
The reliability of an integrated circuit is inferred from the operational characteristics of sample metal oxide semiconductor (MOS) devices switchably coupled to drain/source bias and gate input voltages that are nominal, versus voltage and current conditions that elevate stress and cause temporary or permanent degradation, e.g., hot carrier injection (HCI), bias temperature instability (BTI, NBTI, PBTI), time dependent dielectric breakdown (TDDB). The MOS devices under test (preferably both PMOS and NMOS devices tested concurrently or in turn) are configured as current sources in the supply of power to a ring oscillator having cascaded inverter stages, thereby varying the oscillator frequency as a measure of the effects of stress on the devices under test, but without elevating the stress applied to the inverter stages.