Various embodiments of methods of designing an integrated circuit (IC) are provided herein. One embodiment of one such method includes: (1) generating a functional IC design, (2) determining a target clock rate for the functional IC design, (3) generating a netlist from the functional IC design that meets the target clock rate, (4) determining a unitless performance/power quantifier from the netlist, (5) attempting to increase the unitless performance/power quantifier by changing at least one of a speed, an area and a power consumption in at least some noncritical paths in the netlist, wherein the attempting is performed by a processor and (6) generating a layout of the IC from the netlist.