发明申请
- 专利标题： SEMICONDUCTOR DEVICE USING MULTI-PHASE CLOCK SIGNAL AND INFORMATION PROCESSING SYSTEM INCLUDING THE SAME
- 专利标题（中）： 使用多相时钟信号的半导体器件和包括其的信息处理系统
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申请号： US13598289申请日： 2012-08-29
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公开(公告)号： US20130057326A1公开(公告)日： 2013-03-07
- 发明人: Yoshimitsu YANAGAWA , Tomonori Sekiguchi , Akira Kotabe , Takamasa Suzuki
- 申请人： Yoshimitsu YANAGAWA , Tomonori Sekiguchi , Akira Kotabe , Takamasa Suzuki
- 专利权人： Elpida Memory, Inc.
- 当前专利权人： Elpida Memory, Inc.
- 优先权： JP2011-193625 20110906
- 主分类号： H03L7/00
- IPC分类号： H03L7/00 ; H03H11/26
摘要：
Disclosed herein is a device that includes a delay line that includes n delay circuits cascade-connected and delays an input clock signal by k cycles, and a routing circuit that generates multi-phase clock signals having different phases based on at least a part of n output clock signals output from the n delay circuits, respectively. The n and the k are both integers more than 1 and a greatest common divisor thereof is 1.
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