- 专利标题: MEMORY APPARATUS, SYSTEMS, AND METHODS
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申请号: US13563314申请日: 2012-07-31
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公开(公告)号: US20130058164A1公开(公告)日: 2013-03-07
- 发明人: Violante Moschiano , Tommaso Vali , Giovanni Naso , Vishal Sarin , William Henry Radke , Theodore T. Pekny
- 申请人: Violante Moschiano , Tommaso Vali , Giovanni Naso , Vishal Sarin , William Henry Radke , Theodore T. Pekny
- 主分类号: G11C16/04
- IPC分类号: G11C16/04 ; G11C16/06
摘要:
Threshold voltages in a charge storage memory are controlled by threshold voltage placement, such as to provide more reliable operation and to reduce the influence of factors such as neighboring charge storage elements and parasitic coupling. Pre-compensation or post-compensation of threshold voltage for neighboring programmed aggressor memory cells reduces the threshold voltage uncertainty in a flash memory system. Using a buffer having a data structure such as a lookup table provides for programmable threshold voltage distributions that enables the distribution of data states in a multi-level cell flash memory to be tailored, such as to provide more reliable operation. Additional apparatus, systems, and methods are provided.
公开/授权文献
- US09087594B2 Memory apparatus, systems, and methods 公开/授权日:2015-07-21
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