- 专利标题: MFENCE AND LFENCE MICRO-ARCHITECTURAL IMPLEMENTATION METHOD AND SYSTEM
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申请号: US13619919申请日: 2012-09-14
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公开(公告)号: US20130067200A1公开(公告)日: 2013-03-14
- 发明人: Salvador PALANCA , Stephen A. FISCHER , Subramaniam MAIYURAN , Shekoufeh QAWAMI
- 申请人: Salvador PALANCA , Stephen A. FISCHER , Subramaniam MAIYURAN , Shekoufeh QAWAMI
- 主分类号: G06F9/312
- IPC分类号: G06F9/312
摘要:
A system and method for fencing memory accesses. Memory loads can be fenced, or all memory access can be fenced. The system receives a fencing instruction that separates memory access instructions into older accesses and newer accesses. A buffer within the memory ordering unit is allocated to the instruction. The access instructions newer than the fencing instruction are stalled. The older access instructions are gradually retired. When all older memory accesses are retired, the fencing instruction is dispatched from the buffer.
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