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公开(公告)号：US20130067200A1
公开(公告)日：2013-03-14
申请号：US13619919
申请日：2012-09-14
IPC分类号： G06F9/312
CPC分类号： G06F9/3836 , G06F9/30043 , G06F9/30047 , G06F9/30087 , G06F9/3012 , G06F9/30145 , G06F9/3808 , G06F9/3812 , G06F9/3834 , G06F9/3855 , G06F9/3857 , G06F9/3867 , G06F2009/45583 , G06F2009/45591
摘要： A system and method for fencing memory accesses. Memory loads can be fenced, or all memory access can be fenced. The system receives a fencing instruction that separates memory access instructions into older accesses and newer accesses. A buffer within the memory ordering unit is allocated to the instruction. The access instructions newer than the fencing instruction are stalled. The older access instructions are gradually retired. When all older memory accesses are retired, the fencing instruction is dispatched from the buffer.
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公开(公告)号：US20200310800A1
公开(公告)日：2020-10-01
申请号：US16366941
申请日：2019-03-27
申请人： Jorge PARRA , Dan BAUM , Robert CHAPPELL , Michael ESPIG , Varghese GEORGE , Alexander HEINECKE , Christopher HUGHES , Subramaniam MAIYURAN , Elmoustapha OULD-AHMED-VALL , Prasoonkumar SURTI , Ronen ZOHAR
发明人： Jorge PARRA , Dan BAUM , Robert CHAPPELL , Michael ESPIG , Varghese GEORGE , Alexander HEINECKE , Christopher HUGHES , Subramaniam MAIYURAN , Elmoustapha OULD-AHMED-VALL , Prasoonkumar SURTI , Ronen ZOHAR
摘要： Methods and apparatus for approximation using polynomial functions are disclosed. In one embodiment, a processor comprises decoding and execution circuitry. The decoding circuitry is to decode an instruction, where the instruction comprises a first operand specifying an output location and a second operand specifying a plurality of data element values to be computed. The execution circuitry is to execute the decoded instruction. The execution includes to compute a result for each of the plurality of data element values using a polynomial function to approximate a complex function, where the computation uses coefficients stored in a lookup location for the complex function, and where data element values within different data element value ranges use different sets of coefficients. The execution further includes to store results of the computation in the output location.
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公开(公告)号：US20160092240A1
公开(公告)日：2016-03-31
申请号：US14498561
申请日：2014-09-26
IPC分类号： G06F9/38
CPC分类号： G06F9/3887 , G06F8/443 , G06F8/452 , G06F9/30058 , G06F9/30061 , G06F9/30065 , G06F9/30076 , G06F9/30134 , G06F9/30163 , G06F9/325 , G06F9/3842 , G06F9/3851
摘要： An apparatus and method for a SIMD structured branching. For example, one embodiment of a processor comprises: an execution unit having a plurality of channels to execute instructions; and a branch unit to process control flow instructions and to maintain a per channel count for each channel and a control instruction count for the control flow instructions, the branch unit to enable and disable the channels based at least on the per channel count.
摘要翻译： 一种SIMD结构分支的装置和方法。 例如，处理器的一个实施例包括：具有执行指令的多个通道的执行单元; 以及分支单元，用于处理控制流程指令并维持每个通道的每个通道计数以及用于控制流程指令的控制指令计数，该分支单元至少基于每个通道计数启用和禁用通道。
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公开(公告)号：US20160093069A1
公开(公告)日：2016-03-31
申请号：US14498445
申请日：2014-09-26
CPC分类号： G06T11/00 , G06T1/20 , G06T1/60 , G06T15/005
摘要： An apparatus and method for pixel hashing. For example, one embodiment of a method comprises: determining X and Y coordinates for a pixel block to be processed; performing a lookup in a data structure indexed based on the X and Y coordinates of the pixel block, the lookup identifying an entry in the data structure corresponding to the X and Y coordinates of the pixel block; reading information from the entry identifying an execution cluster to process the pixel block; and executing the pixel block by the execution cluster.
摘要翻译： 一种用于像素散列的装置和方法。 例如，方法的一个实施例包括：确定要处理的像素块的X和Y坐标; 在基于像素块的X和Y坐标索引的数据结构中执行查找，所述查找识别与所述像素块的X和Y坐标相对应的数据结构中的条目; 从识别执行集群的条目读取信息以处理像素块; 并通过执行簇执行像素块。
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