Invention Application
- Patent Title: POWER TRANSISTOR DEVICE AND MANUFACTURING METHOD THEREOF
- Patent Title (中): 功率晶体管器件及其制造方法
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Application No.: US13533957Application Date: 2012-06-26
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Publication No.: US20130105891A1Publication Date: 2013-05-02
- Inventor: Yung-Fa Lin , Shou-Yi Hsu , Meng-Wei Wu , Main-Gwo Chen , Chia-Hao Chang , Chia-Wei Chen
- Applicant: Yung-Fa Lin , Shou-Yi Hsu , Meng-Wei Wu , Main-Gwo Chen , Chia-Hao Chang , Chia-Wei Chen
- Priority: TW100139574 20111031
- Main IPC: H01L21/336
- IPC: H01L21/336 ; H01L29/78

Abstract:
The present invention provides a power transistor device including a substrate, an epitaxial layer, a dopant source layer, a doped drain region, a first insulating layer, a gate structure, a second insulating layer, a doped source region, and a metal layer. The substrate, the doped drain region, and the doped source region have a first conductive type, while the epitaxial layer has a second conductive type. The epitaxial layer is formed on the substrate and has at least one through hole through the epitaxial layer. The first insulating layer, the gate structure, and the second insulating layer are formed sequentially on the substrate in the through hole. The doped drain region and doped source region are formed in the epitaxial layer at one side of the through hole. The metal layer is formed on the epitaxial layer and extends into the through hole to contact the doped source region.
Public/Granted literature
- US08524559B2 Manufacturing method of power transistor device Public/Granted day:2013-09-03
Information query
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