- 专利标题: STACKED SEMICONDUCTOR DIE ASSEMBLIES WITH MULTIPLE THERMAL PATHS AND ASSOCIATED SYSTEMS AND METHODS
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申请号: US13613540申请日: 2012-09-13
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公开(公告)号: US20130119528A1公开(公告)日: 2013-05-16
- 发明人: Steven K. Groothuis , Jian Li , Haojun Zhang , Paul A. Silvestri , Xiao Li , Shijian Luo , Luke G. England , Brent Keeth , Jaspreet Gandhi
- 申请人: Steven K. Groothuis , Jian Li , Haojun Zhang , Paul A. Silvestri , Xiao Li , Shijian Luo , Luke G. England , Brent Keeth , Jaspreet Gandhi
- 申请人地址: US ID Boise
- 专利权人: MICRON TECHNOLOGY, INC.
- 当前专利权人: MICRON TECHNOLOGY, INC.
- 当前专利权人地址: US ID Boise
- 主分类号: H01L23/48
- IPC分类号: H01L23/48 ; H01L21/50
摘要:
Stacked semiconductor die assemblies with multiple thermal paths and associated systems and methods are disclosed herein. In one embodiment, a semiconductor die assembly can include a plurality of first semiconductor dies arranged in a stack and a second semiconductor die carrying the first semiconductor dies. The second semiconductor die can include a peripheral portion that extends laterally outward beyond at least one side of the first semiconductor dies. The semiconductor die assembly can further include a thermal transfer feature at the peripheral portion of the second semiconductor die. The first semiconductor dies can define a first thermal path, and the thermal transfer feature can define a second thermal path separate from the first semiconductor dies.
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