发明申请
- 专利标题: LOGIC AND NON-VOLATILE MEMORY (NVM) INTEGRATION
- 专利标题(中): 逻辑和非易失性存储器(NVM)集成
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申请号: US13307719申请日: 2011-11-30
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公开(公告)号: US20130137227A1公开(公告)日: 2013-05-30
- 发明人: MEHUL D. SHROFF , Mark D. Hall
- 申请人: MEHUL D. SHROFF , Mark D. Hall
- 主分类号: H01L21/8238
- IPC分类号: H01L21/8238 ; H01L21/336
摘要:
A method includes forming a gate dielectric over a substrate in an NVM region and a logic region; forming a first conductive layer over the gate dielectric in the NVM region and the logic region; patterning the first conductive layer in the NVM region to form a select gate; forming a charge storage layer over the select gate in the NVM region and the first conductive layer in the logic region; forming a second conductive layer over the charge storage layer in the NVM region and the logic region; removing the second conductive layer and the charge storage layer from the logic region; patterning the first conductive layer in the logic region to form a first logic gate; and after forming the first logic gate, patterning the second conductive layer in the NVM region to form a control gate which overlaps a sidewall of the select gate.
公开/授权文献
- US08536006B2 Logic and non-volatile memory (NVM) integration 公开/授权日:2013-09-17