发明申请
- 专利标题： SEMICONDUCTOR PACKAGE STRUCTURE AND MANUFACTURING METHOD THEREOF
- 专利标题（中）： 半导体封装结构及其制造方法
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申请号： US13647406申请日： 2012-10-09
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公开(公告)号： US20130140686A1公开(公告)日： 2013-06-06
- 发明人: Yu-Tang Pan , Shih-Wen Chou
- 申请人： ChipMOS Technologies Inc.
- 申请人地址： TW Hsinchu
- 专利权人： CHIPMOS TECHNOLOGIES INC.
- 当前专利权人： CHIPMOS TECHNOLOGIES INC.
- 当前专利权人地址： TW Hsinchu
- 优先权： TW100144388 20111202
- 主分类号： H01L21/56
- IPC分类号： H01L21/56 ; H01L23/495
摘要：
A method of manufacturing a semiconductor package structure is provided. A heat-conductive block is adhered to a portion of a second surface of a conductive substrate via a first adhesive layer. An opening is formed by performing a half-etching process on a first surface of the conductive substrate. The remaining conductive substrate is patterned to form leads and expose a portion of the heat-conductive block. Each lead has a first portion and a second portion. A thickness of the first portion is greater than a thickness of the second portion. A first lower surface of the first portion and a second lower surface of the second portion are coplanar. A chip is disposed on the exposed portion of the heat-conductive block and electrically connected to the second portions of the leads. A first bottom surface of the heat-conductive block and a second bottom surface of a molding compound are coplanar.
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