Invention Application
US20130164938A1 Selective Bias Compensation for Patterning Steps in CMOS Processes
有权
CMOS工艺中图案化步骤的选择性偏置补偿
- Patent Title: Selective Bias Compensation for Patterning Steps in CMOS Processes
- Patent Title (中): CMOS工艺中图案化步骤的选择性偏置补偿
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Application No.: US13335618Application Date: 2011-12-22
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Publication No.: US20130164938A1Publication Date: 2013-06-27
- Inventor: Ming-Feng Shieh , Ching-Yu Chang
- Applicant: Ming-Feng Shieh , Ching-Yu Chang
- Applicant Address: TW Hsin-Chu
- Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
- Current Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
- Current Assignee Address: TW Hsin-Chu
- Main IPC: H01L21/311
- IPC: H01L21/311 ; G03F7/20

Abstract:
A method includes forming a photo resist pattern, and performing a light-exposure on a first portion of the photo resist pattern, wherein a second portion of the photo resist pattern is not exposed to light. A photo-acid reactive material is coated on the first portion and the second portion of the photo resist pattern. The photo-acid reactive material reacts with the photo resist pattern to form a film. Portions of the photo-acid reactive material that do not react with the photo resist pattern are then removed, and the film is left on the photo resist pattern.
Public/Granted literature
- US08795540B2 Selective bias compensation for patterning steps in CMOS processes Public/Granted day:2014-08-05
Information query
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