发明申请
US20130169327A1 Charge-to-Digital Timer 有权
电荷到数字定时器

Charge-to-Digital Timer
摘要:
The charge-to-digital timer apparatus and method disclosed herein estimates the elapsed time between two signals, e.g., a start signal and a stop signal. To that end, at least a capacitive load is charged with a known current to generate a load voltage. Subsequently, a first voltage is ramped in a plurality of discrete voltage steps associated with a plurality of known capacitances until the ramped voltage satisfies a predetermined criterion relative to a second voltage. The elapsed time is determined from the discrete voltage steps, one of the first and second voltages, the known current, and the known capacitive load.
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