发明申请
US20130221328A1 Pad-Less Gate-All Around Semiconductor Nanowire FETs On Bulk Semiconductor Wafers
有权
无衬底栅极 - 全周围半导体纳米线FET在散装半导体晶片上
- 专利标题： Pad-Less Gate-All Around Semiconductor Nanowire FETs On Bulk Semiconductor Wafers
- 专利标题（中）： 无衬底栅极 - 全周围半导体纳米线FET在散装半导体晶片上
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申请号： US13405732申请日： 2012-02-27
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公开(公告)号： US20130221328A1公开(公告)日： 2013-08-29
- 发明人: Jeffrey W. Sleight , Josephine B. Chang , Isaac Lauer , Shreesh Narasimha
- 申请人： Jeffrey W. Sleight , Josephine B. Chang , Isaac Lauer , Shreesh Narasimha
- 申请人地址： US NY Armonk
- 专利权人： International Business Machines Corporation
- 当前专利权人： International Business Machines Corporation
- 当前专利权人地址： US NY Armonk
- 主分类号： H01L29/775
- IPC分类号： H01L29/775 ; H01L21/335
摘要：
A method for forming a nanowire field effect transistor (FET) device, the method includes forming a suspended nanowire over a semiconductor substrate, forming a gate structure around a portion of the nanowire, forming a protective spacer adjacent to sidewalls of the gate and around portions of nanowire extending from the gate, removing exposed portions of the nanowire left unprotected by the spacer structure, and epitaxially growing a doped semiconductor material on exposed cross sections of the nanowire to form a source region and a drain region.