发明申请
- 专利标题: COMBINATION FOR COMPOSITE LAYERED CHIP PACKAGE
- 专利标题(中): 组合层叠芯片包装的组合
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申请号: US13422723申请日: 2012-03-16
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公开(公告)号: US20130241081A1公开(公告)日: 2013-09-19
- 发明人: Yoshitaka SASAKI , Hiroyuki ITO , Atsushi IIJIMA
- 申请人: Yoshitaka SASAKI , Hiroyuki ITO , Atsushi IIJIMA
- 申请人地址: CN HONG KONG US CA MILPITAS
- 专利权人: SAE MAGNETICS (H.K.) LTD.,HEADWAY TECHNOLOGIES, INC.
- 当前专利权人: SAE MAGNETICS (H.K.) LTD.,HEADWAY TECHNOLOGIES, INC.
- 当前专利权人地址: CN HONG KONG US CA MILPITAS
- 主分类号: H01L25/00
- IPC分类号: H01L25/00 ; H01L21/60
摘要:
A main package includes a plurality of stacked semiconductor chips and a plurality of first terminals associated with different ones of the semiconductor chips. An additional package includes an additional semiconductor chip and at least one second terminal electrically connected to the additional semiconductor chip. The additional semiconductor chip is to substitute for one of the plurality of semiconductor chips in the main package. The main package and the additional package are arranged in one of a plurality of relative positional relationships that is selected according to which one of the plurality of semiconductor chips in the main package is to be substituted with the additional semiconductor chip.
公开/授权文献
- US08710641B2 Combination for composite layered chip package 公开/授权日:2014-04-29
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