Invention Application
- Patent Title: STACKED MEMORY WITH INTERFACE PROVIDING OFFSET INTERCONNECTS
- Patent Title (中): 具有接口的堆叠存储器提供偏移互连
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Application No.: US13997148Application Date: 2011-12-02
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Publication No.: US20130272049A1Publication Date: 2013-10-17
- Inventor: Pete Vogt , Andre Schaefer , Warren Morrow , John Halbert , Jin Kim , Kenneth Shoemaker
- Applicant: Pete Vogt , Andre Schaefer , Warren Morrow , John Halbert , Jin Kim , Kenneth Shoemaker
- Applicant Address: US CA Santa Clara
- Assignee: INTEL CORPORATION
- Current Assignee: INTEL CORPORATION
- Current Assignee Address: US CA Santa Clara
- International Application: PCT/US2011/063191 WO 20111202
- Main IPC: G11C5/06
- IPC: G11C5/06 ; H01L23/48

Abstract:
Dynamic operations for operations for a stacked memory with interface providing offset interconnects. An embodiment of memory device includes a system element and a memory stack coupled with the system element, the memory stack including one or more memory die layers. Each memory die layer includes first face and a second face, the second face of each memory die layer including an interface for coupling data interface pins of the memory die layer with data interface pins of a first face of a coupled element. The interface of each memory die layer includes connections that provide an offset between each of the data interface pins of the memory die layer and a corresponding data interface pin of the data interface pins of the coupled element.
Public/Granted literature
- US08971087B2 Stacked memory with interface providing offset interconnects Public/Granted day:2015-03-03
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