发明申请
US20130282778A1 System and Method for Signal Processing in Digital Signal Processors 有权
数字信号处理器信号处理系统与方法

System and Method for Signal Processing in Digital Signal Processors
摘要:
An embodiment of a method and a related apparatus for digital computation of a floating point complex multiply-add is provided. The method includes receiving an input addend, a first product, and a second product. The input addend, the first product and the second product each respectively has a mantissa and an exponent. The method includes shifting the mantissas of the two with smaller exponents of the input addend, the first product, and the second product to align together with the mantissa of the one with largest exponent of the input addend, the first product and the second product, and adding the aligned input addend, the aligned first product and the aligned second product.
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