发明申请
- 专利标题: METHODS OF FABRICATING SEMICONDUCTOR DEVICES HAVING BURIED CHANNEL ARRAY
- 专利标题(中): 制作带通道阵列的半导体器件的方法
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申请号: US13761376申请日: 2013-02-07
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公开(公告)号: US20130288472A1公开(公告)日: 2013-10-31
- 发明人: Jay-Bok Choi , Yoo-Sang Hwang , Ah-Young Kim , Ye-Ro Lee , Gyo-Young Jin , Hyeong-sun Hong
- 申请人: Jay-Bok Choi , Yoo-Sang Hwang , Ah-Young Kim , Ye-Ro Lee , Gyo-Young Jin , Hyeong-sun Hong
- 优先权: KR10-2012-0045696 20120430
- 主分类号: H01L29/423
- IPC分类号: H01L29/423
摘要:
A method of fabricating a semiconductor device comprises forming a first and a second parallel field regions in a substrate, the parallel field regions are extended in a first direction, forming a first and a second gate capping layer in a first and a second gate trench formed in the substrate respectively, removing the gate capping layers partially so that a first landing pad hole is expanded to overlap the gate capping layers buried in the substrate partially, forming a landing pad material layer in the first space, and forming a bit line contact landing pad by planarizing the landing pad material layer to the level of top surfaces of the capping layers.
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