A DMA controller operates independently from a CPU, reads image data stored on an ROM sequentially in given units from the first reading start position of the image data and writes the image data into a buffer. A DMA controller operates independently from the CPU, writes the data read into the buffer to a VRAM one byte at a time from the writing start position. The controller of a companion chip updates the writing start position in the VRAM to the position of the same column in the next row each time writing the data string in each row is completed.