发明申请
- 专利标题: TAMPER DETECTOR FOR SECURE MODULE
- 专利标题(中): 用于安全模块的夯实检测器
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申请号: US13475947申请日: 2012-05-19
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公开(公告)号: US20130312122A1公开(公告)日: 2013-11-21
- 发明人: Mohit Arora , Rakesh Pandey , Pushkar Sareen , Prashant Bhargava
- 申请人: Mohit Arora , Rakesh Pandey , Pushkar Sareen , Prashant Bhargava
- 申请人地址: US TX Austin
- 专利权人: FREESCALE SEMICONDUCTOR, INC
- 当前专利权人: FREESCALE SEMICONDUCTOR, INC
- 当前专利权人地址: US TX Austin
- 主分类号: G06F21/02
- IPC分类号: G06F21/02
摘要:
A tamper detector has input and output pins for connection to ends of a tamper detection circuit, and a corresponding set of linear feedback shift registers (LFSRs) timed by clock signals for generating pseudo-random coded detection signals as a function of seed values and of a generator polynomial defined by feedback taps. A comparator compares signals received from the detection circuit with the coded detection signals. A multiplexer provides the coded detection signal selectively from the LFSRs to the output pin and the comparator. A controller varies the seed values for different cycles of values of the pseudo-random coded detection signals. The controller also controls the generator polynomial and a frequency of the clock signals for different cycles of values of the pseudo-random coded detection signals.
公开/授权文献
- US08689357B2 Tamper detector for secure module 公开/授权日:2014-04-01