Invention Application
- Patent Title: METHOD AND SYSTEM FOR TRANSIENT VOLTAGE SUPPRESSORS
- Patent Title (中): 瞬态电压抑制器的方法和系统
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Application No.: US13967886Application Date: 2013-08-15
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Publication No.: US20130328064A1Publication Date: 2013-12-12
- Inventor: Avinash Srikrishnan Kashyap , David Mulford Shaddock , Emad Andarawis Andarawis , Peter Micah Sandvik , Stephen Daley Arthur , Vinayak Tilak
- Applicant: GENERAL ELECTRIC COMPANY
- Applicant Address: US NY Schenectady
- Assignee: GENERAL ELECTRIC COMPANY
- Current Assignee: GENERAL ELECTRIC COMPANY
- Current Assignee Address: US NY Schenectady
- Main IPC: H01L21/56
- IPC: H01L21/56 ; H01L29/16

Abstract:
A method of forming a silicon carbide transient voltage suppressor (TVS) assembly and a system for a transient voltage suppressor (TVS) assembly are provided. The TVS assembly includes a semiconductor die in a mesa structure that includes a first layer of a first wide band gap semiconductor having a conductivity of a first polarity, a second layer of the first or a second wide band gap semiconductor having a conductivity of a second polarity coupled in electrical contact with the first layer wherein the second polarity is different than the first polarity. The TVS assembly also includes a third layer of the first, the second, or a third wide band gap semiconductor having a conductivity of the first polarity coupled in electrical contact with the second layer. The layer having a conductivity of the second polarity is lightly doped relative to the layers having a conductivity of the first polarity.
Public/Granted literature
- US08765524B2 Method and system for transient voltage suppressors Public/Granted day:2014-07-01
Information query
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